hi guys
i want to use variable sink block in GRC but i can`t find the block, could you
tell me how i find that?
please help me .
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Comment's interspersed below.
On Sun, Sep 16, 2012 at 8:51 AM, Michael Hill wrote:
> Hi guys,
>
> Thanks for the responses! Again, let me point out i am quite new to alot
> of the IIP3 concepts and still have my areas of confusion regarding the
> board's operation, so if I say anything weird or
On 09/19/2012 07:42 PM, Jose Torres Diaz wrote:
> Hi Josh,
>
> I modified in my .h file:
>
> #include
>
> and also, I inherit from gnu radio as follows:
>
> //* This uses the preferred technique: subclassing gr_sync_block.
> //class asrp_test_temporal : public gr_sync_block
> class asrp_test
Yes it was my fault. Power cycle did the trick.
LD
Hmm, not sure. Make sure you are
>
> 1) There are two commands there. The downloader and the burner. Make
> sure both are executed.
>
> 2) You will need to power cycle the USRP after the burn
>
> If that is failing, let me know but... it looks l
Hi Josh,
I modified in my .h file:
#include
and also, I inherit from gnu radio as follows:
//* This uses the preferred technique: subclassing gr_sync_block.
//class asrp_test_temporal : public gr_sync_block
class asrp_test_temporal : public gnuradio::block// <--Here, I added
the inherit
{
On 09/19/2012 05:29 PM, LD Zhang wrote:
> Hello community,
>
> There seems to be software compatibility issue between the host (ubuntu
> 12.04) uhd build and USRP N210 FPGA image. The Runtime errors are captured
> as:
>
> --
> $ uhd_usrp_probe
> linux; GNU C++ versio
On 09/19/2012 04:54 PM, Anisha Gorur wrote:
> I tried this out, and I am getting two real signals, while I want two
> complex signals. From dboards.rst:
>
> ^^^
> Basic RX and LFRX
> ^^^
> The Basic RX and LFRX boards have 4 frontends:
>
> * **Fro
Hello community,
There seems to be software compatibility issue between the host (ubuntu
12.04) uhd build and USRP N210 FPGA image. The Runtime errors are captured
as:
--
$ uhd_usrp_probe
linux; GNU C++ version 4.6.3; Boost_104601; UHD_003.004.003-224-gc2e197c0
-- Ope
I tried this out, and I am getting two real signals, while I want two
complex signals. From dboards.rst:
^^^
Basic RX and LFRX
^^^
The Basic RX and LFRX boards have 4 frontends:
* **Frontend A:** real signal on antenna RXA
* **Frontend B:** real sig
thanks!
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On 19 Sep 2012 15:09, Favati wrote:
> Hi there!
> I'm using
rtl_tcp with a dongle but when i connect to the device running
>
rtl_tcp i get a lot of these messages:
>
> 11+, now 1
> 11-, now 0
>
> .
> .
> .
> .
> .
> .
>
> what does they mean? how can i avoid
diplayng these messages?
>
Maybe i'm loosing packets?
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Hi there!
I'm using rtl_tcp with a dongle but when i connect to the device running
rtl_tcp i get a lot of these messages:
11+, now 1
11-, now 0
.
.
.
.
.
.
what does they mean? how can i avoid diplayng these messages?
Many thanks!
___
Discuss
Great! So if i selected 0:A and 0:B as multiple subdevices, I would receive
something like I0, Q0 and I1, Q1?
On Wed, Sep 19, 2012 at 12:45 PM, Josh Blum wrote:
>
>
> On 09/19/2012 10:44 AM, Anisha Gorur wrote:
> > Hello All,
> >
> > I know that on the USRP1, it was possible to have four seperat
On 09/19/2012 10:44 AM, Anisha Gorur wrote:
> Hello All,
>
> I know that on the USRP1, it was possible to have four seperate RX
> channels, and therefore receive two pairs of IQ samples. I was wondering if
> there were any way to do this on a USRP N210, using a basic RX
> daughterboard, even by
Hello All,
I know that on the USRP1, it was possible to have four seperate RX
channels, and therefore receive two pairs of IQ samples. I was wondering if
there were any way to do this on a USRP N210, using a basic RX
daughterboard, even by possible changing the FPGA code, or it you could
only have
On Wed, Sep 19, 2012 at 1:28 AM, Viktor Ivan Rodriguez Abdala
wrote:
> Hi,
>
> I get the following output with dir(Umbrella), and I can't see anything
> called dftsofdm
>
> ['SwigPyIterator', 'SwigPyIterator_swigregister',
> 'Umbrella_bin2dec_ff_sptr', 'Umbrella_bin2dec_ff_sptr_swigregister',
> 'U
Hi All,
I know that many of the users are looking for used USRPs, so I thought I'd let
you know that I have listed 2 of my USRP 1s for sale on ebay. One is equipped
with a 52MHz clock required for running OpenBTS and the other one is unaltered.
I prefer to ship to the UK only, but if you are el
Hi Josh,
Thanks for your kind reply. The figure is shown in
http://dl.dropbox.com/u/39710586/rfx2400_sample.png .
I guess it is not caused by Tx transient, because:
1) The TX N210 is just dedicated to TX path in my application, and thus
does not have Tx/Rx switch capability;
2) I have used XCVR24
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