On 06/04/2011 03:58 PM, Marcus D. Leech wrote:
A disadvantage to the get_rx_sensor("rssi") approach is that only some
of the daughter-boards have that (analog) function, and also,
the RSSI is generally sensed at the bandwidth of the RF input to the
down-converter chip, rather than at your fi
On 06/04/2011 02:04 PM, Josh Blum wrote:
There is an "rssi" sensor:
http://www.ettus.com/uhd_docs/manual/html/dboards.html#rfx-series
from the uhd api:
usrp->get_rx_sensor("rssi")
or in python w/ gr-uhd
usrp.get_dboard_sensor("rssi")
A disadvantage to the get_rx_sensor("rssi") approach is tha
The output of the FSM belongs to the set {0,1,2,3}.
The Viterbi decoder requires a vector of size 4 for each FSM
symbol. So if the output of the FSM is [0,3,3,2,1,0] (6 symbols)
then you need to provide the Viterbi decoder with a stream
of 6 x 4 floats, each indicating the "distance" between
the "
On 06/04/2011 01:52 PM, Kresimir Dabcevic wrote:
Hi list!
Is it possible to measure RSSI on RFX2400 with N210 motherboard (UHD
drivers)?
>From the archives, it seems that read_rssi() is defined only for
XCVR2450,
and read_aux_adc(side,0) described on
http://gnuradio.org/redmine/wiki/1/UsrpFA
On 06/04/2011 10:52 AM, Kresimir Dabcevic wrote:
>
> Hi list!
>
> Is it possible to measure RSSI on RFX2400 with N210 motherboard (UHD drivers)?
> From the archives, it seems that read_rssi() is defined only for XCVR2450,
> and read_aux_adc(side,0) described on
> http://gnuradio.org/redmine/wi
Hi list!
Is it possible to measure RSSI on RFX2400 with N210 motherboard (UHD drivers)?
>From the archives, it seems that read_rssi() is defined only for XCVR2450,
and read_aux_adc(side,0) described on
http://gnuradio.org/redmine/wiki/1/UsrpFAQRSSI
cannot be called (or I'm calling it wrong).
Th
On 06/04/2011 09:35 AM, Marcus D. Leech wrote:
>>
>>
>>
>> Yea, you cannot send samples when you dont want to transmit. There isnt
>> really such a concept of that in GRC itself, but you certainly can
>> implement the blocks and control logic and connect them in grc. Someone
>> should make int
On 06/04/2011 09:26 AM, Marcus D. Leech wrote:
>>
>> Yea, you cannot send samples when you dont want to transmit. There isnt
>> really such a concept of that in GRC itself, but you certainly can
>> implement the blocks and control logic and connect them in grc. Someone
>> should make interesting
>
>
>
> Yea, you cannot send samples when you dont want to transmit. There isnt
> really such a concept of that in GRC itself, but you certainly can
> implement the blocks and control logic and connect them in grc. Someone
> should make interesting use of those tagging features as well. :-)
>
>
>
> Yea, you cannot send samples when you dont want to transmit. There isnt
> really such a concept of that in GRC itself, but you certainly can
> implement the blocks and control logic and connect them in grc. Someone
> should make interesting use of those tagging features as well. :-)
>
> -Josh
>
On 06/04/2011 05:16 AM, Marcus D. Leech wrote:
>>
>> I've found it impossible to create a half-duplex transceiver with WBX
>> and one antenna in grc. Would an open valve in the transmit chain stop
>> the transmitter and enable the receiver, or would a closed valve in
>> the receiver automatically
>
> I've found it impossible to create a half-duplex transceiver with WBX
> and one antenna in grc. Would an open valve in the transmit chain stop
> the transmitter and enable the receiver, or would a closed valve in
> the receiver automatically stop the transmitter? I've experimented
> with severa
On 02-06-11 05:35, Marcus D. Leech wrote:
On 06/01/2011 11:07 PM, Yang wrote:
Would you like to expand it in detail or refer me to some places I can
look for? Dose this need 2 antennas on 1 daughterboard? It would be
great if I can build a graph with rx path and tx path and run 2 paths
simultane
Hi everyone,
I want to implement convolutional coding using the trellis block. I don't
want to use any modulation scheme or anything else after the encoder. The
flow graph I want is shown below
vector source>trellis encoder> viterbi or any decoder--->sink
Part of the code is shown belo
14 matches
Mail list logo
