I have been working on modifications to the USRP board so that I can pass
a gating signal through the basic RX daughterboard to gate signal
collection for a pulsed radar application. This is somewhat working, but I
am having problems with data alignment when stopping and starting the
system
Hi,
I'm a new comer to usrp2. If we want to use a reference 10MHz clock instead
of 100MHz, is there any hardware modification needed?
Now I only change the fpga_master_clock_freq in usrp2_impl.cc from *freq =
1L to *freq = 1000L. I tried to send digital signal in
gnuradio-example/pyth
Hi Ali,
I have done the similar as a part in my thesis as well. But I used two USRPs
to serve as receiver and transmitter. When u try to listen on a daughter
board using same USRP and transmit simultaneously ( which I tried ) you do
not receive the transmitted signal. I did not dwell much on this
Sounds like an interesting paper but the website requires a Notre
Dame password to download the file.
I apologize; I didn't realize that website was password protected (it
didn't ask me ;) Here's another:
< http://www.nd.edu/~jnl/pubs/crohas-ms-nd-2008.pdf >
___
Hello the list: I need to use the digital I/O from my 2400 daughterboard
to drive a sequencer for a t/r system. I wanted to convert the USRP lines
to 5 V safely.
I tried 5 Fairchild type H11L1 optoisolators, current production,
available from Digi-Key, in a test setup. Put a 1k ohm resistor in seri
Hi,
I completed the installations and checked tone generation and benchmark_tx/rx
over a pair of usrp, along with usrp_wfm_rcv.py for or FM reception. These
examles ran pretty fine. Then I tried tunnel.py with command line arguments as
in README file:
./tunnel.py -f 423.0M --bitrate=500k
The o
Michael Dickens wrote:
Hi Ali - Check out the following MS thesis, by a ex-colleague of mine
here at ND:
Practical Implementation of a Cognitive Radio System for Dynamic
Spectrum Access
< http://etd.nd.edu/ETD-db/theses/available/etd-07252008-162749/ >
It sounds similar to what you're talki
I noticed there was some work in this area being done by Martin Dudok van
Heel in the developers branch of the repository.
Can anyone comment on what has been done so far in this area and what kind
of speeds they are getting now?
Thanks in advance,
Isaac
--
View this message in context:
http:/
On Fri, Mar 20, 2009 at 10:33 AM, Brian Padalino wrote:
> Assuming an FSK system with unknown frequency separation and baudrate,
> is the above algorithm robust enough to determine said parameters to
> then pass along to a coherent demodulator to achieve a better BER?
Yes, though perhaps not in
Don Latham wrote:
I'm just checking so's I don't destroy my USRP mboard. The I/O lines such
as io_tx_13 etc. that are available on the flex 2400's seem to go straight
to the Cyclone FPGA. If that's the case, are they set to LVCMOS or LVTTL?
And, is the voltage used 3.3 V? I think I read the answe
I'm just checking so's I don't destroy my USRP mboard. The I/O lines such
as io_tx_13 etc. that are available on the flex 2400's seem to go straight
to the Cyclone FPGA. If that's the case, are they set to LVCMOS or LVTTL?
And, is the voltage used 3.3 V? I think I read the answer on the
schematics,
On Thu, Mar 19, 2009 at 09:12:00PM -0700, Eric Blossom wrote:
> On Thu, Mar 19, 2009 at 08:50:13PM -0700, yyzhuang wrote:
> >
> > I'm sorry.
> >
> > If we do ./tunnel and ping between two boxes over the air, both tx and rx
> > breaks after a few ICMP packets exchange. They don't break at the sam
On Fri, Mar 20, 2009 at 1:27 PM, Johnathan Corgan
wrote:
> A common, non-coherent method for FSK demodulation and baud rate
> detection is to multiply each succeeding sample by the complex
> conjugate of the preceding sample, then take the phase of the product.
> This turns the sample series into
Hi Ali - Check out the following MS thesis, by a ex-colleague of mine
here at ND:
Practical Implementation of a Cognitive Radio System for Dynamic
Spectrum Access
< http://etd.nd.edu/ETD-db/theses/available/etd-07252008-162749/ >
It sounds similar to what you're talking about, and certainl
On Fri, Mar 20, 2009 at 10:11 AM, Brian Padalino wrote:
> FSK is all about delta phase shifts. If a mark is a + frequency, and
> a space is a - frequency (or vice versa, your choice), then I would
> think it would be easy to keep track of how large the deltas between
> phases were and when they
On Fri, Mar 20, 2009 at 11:30 AM, kaleem ahmad wrote:
>
> Thank Brian,
>
> Can you give some hint, what do mean ??? I mean a little idea what do you
> want to say?
FSK is all about delta phase shifts. If a mark is a + frequency, and
a space is a - frequency (or vice versa, your choice), then I
Use an Intermediate Frequency (IF) and frequency translating filter.
Paul Mathews
-Original Message-
From: Markus Feldmann [mailto:feldmann_mar...@gmx.de]
Sent: Friday, March 20, 2009 5:06 AM
To: gnu radio mailing list
Subject: [Discuss-gnuradio] unknown peak in the FFT-Plot Sink
Hi Al
In GRC I'm setting up a flow graph to modulate and demodulate a text
file (simulation and without the USRP). DBPSK and D8PSK runs just fine ,
however with DQPSK I get the text but it is garbled in places? Since it's
the same flow graphs, with the only differnece being menu picks in the mod
and
Thank Brian,
Can you give some hint, what do mean ??? I mean a little idea what do you
want to say?
Best Regards
Brian Padalino wrote:
>
> On Fri, Mar 20, 2009 at 9:34 AM, kaleem ahmad
> wrote:
>>
>> Thanks Ed,
>>
>> ADC sampling rate = 64MHz
>> it gives resulution time = 1/64MHz = 156 ns
>
As a follow upI did some popping and swapping and found that the RFX 900
board was bad. I put in a RFX 2400 card and the the very pronouced carrier
I saw before dissappeared and the signal transmitted out of the RFX brd
looked liked the signal coming out of the modulator. I was able send a
On Fri, Mar 20, 2009 at 9:34 AM, kaleem ahmad wrote:
>
> Thanks Ed,
>
> ADC sampling rate = 64MHz
> it gives resulution time = 1/64MHz = 156 ns
> if we choose N=512 for FFT then total observation time for one scan(one
> complete FFT) is = 156ns x 512 = 8 micro sec
> if the maximum possible (expect
Dear all,
I just installed gnuradio and a USRP. When running the python tests such
as the one bellow I am getting the following error message that seems to
do with some upgrade:
test_dft_synth.py usrp_tv_rcv.py
%: ~/gnuradio-3.1.3/gnuradio-examples/python/usrp$
./test_dft_analysis
Hi All,
i want to determine the value of the shown signal in my FFT-Plot
sink as exactly as i can. The reading error is to big. If i could zoom
into the FFT-Plot sink it would be better, but i don't know how to
zoom in. It would be nicer to read the value of the middle of the
FFT-Plot by any pyth
Thanks Ed,
ADC sampling rate = 64MHz
it gives resulution time = 1/64MHz = 156 ns
if we choose N=512 for FFT then total observation time for one scan(one
complete FFT) is = 156ns x 512 = 8 micro sec
if the maximum possible (expected) cycle time is 200ms then:
it needs 200ms/8microsec = 2500 contin
Hi Eric,
I solved the problem using your suggestion.
I changed the line 76 at u2_init.c:
from: ad9777_write_reg(1, R1_INTERP_4X | R1_REAL_MIX);
to: ad9777_write_reg(1, 0xB0 | R1_REAL_MIX);
Then, I was able to tx frequencies higher than 50 MHz - [50,100] MHz.
Thanks a lot! :D
Hi All,
in all the examples and in my own gnuradio Programm, there
is an unknown Peak in the FFT-Plot sink.
Here is the Screenshot:
http://img257.imageshack.us/img257/8017/nochstrender.jpg
How to avoid this ?
Wherefrom does this come ?
I attach my Program to this mail, but i think it is still o
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