Hi folks,
Is there any BPSK/QPSK example "a la"
fsxk_tx.py/fsk_rx.py floating around ?
Thanks,
Angilberto.
__
Do You Yahoo!?
Tired of spam? Yahoo! Mail has the best spam protection around
http://mail.yahoo.com
_
Hi,
I wanted to be able to get 8 bit samples from the usrp so I tried to hack this
into the verilog code.
Since I don't want to fry my board I didn't compile and try to install it but
first want to ask if I am on the right track.
(I didn't even install Quartus II web-edition yet since I am work
Gang - here's a quick'n'dirty sweeper for the usrp - it plots the
response of an AM broadcast band filter:
http://webpages.charter.net/cswiger/ate/
--Chuck
___
Discuss-gnuradio mailing list
Discuss-gnuradio@gnu.org
http://lists.gnu.org/mailman/listi
Hi Hew How Chee,
I did some experiment on the CX tv card some time
back. Looks like a continuous capture of 28MHz 8 bit
data from the video ADC is possible, at least it seems
like that.
This sounds very promising.
I tried capturing a sine wave and also raw
composite TV signal. However I did n
That is all the FUN!
NOT
Actually, I am very stable on using SUSE now and I have 9.3. They put
"pre release gcc 3.3.3" as the compiler. My linux running around days
are much more limited since I gave up on Gentoo, etc. I need stability
now so I can do all these tasks in a stable environm
Hi,
I did some experiment on the CX tv card some time
back. Looks like a continuous capture of 28MHz 8 bit
data from the video ADC is possible, at least it seems
like that. I tried capturing a sine wave and also raw
composite TV signal. However I did not proceed further
because the data looks noi
David Bengtson wrote:
Matt:
Is there a PDF somewhere of the board outline for the USRP
daughterboards? I need to generate a board outline in Eagle, and I'd
like to get the relative location of the board to board connector and
the standoff holes.
I'm planning to do a daughterboard design in
