unction.
>
> BR,
> Jan
>
>
>> Am 13.11.24 um 23:43 schrieb 'James Jackson' via KiCad Developers:
>> schematic rule area with an attached directive label
>
> --
> You received this message because you are subscribed to the Google Groups
> &q
Jan,
In the nightlies you can use a schematic rule area with an attached
directive label to assign a netclass to any net contained within the rule
area - that's less clutter than the many directive labels method you're
showing. They are describe with an example at the end of the netclasses
section
add another wire
>>>>>>>> to a
>>>>>>>> coloured net, that wire will also pick up the net colour. I don't
>>>>>>>> think,
>>>>>>>> without assigning a netclass, we have a way to do this at the moment
>&g
> netclass-defined colour to the PCB, which seems an integral part of this
>>>>>>> feature for assisting in laying out complex boards).
>>>>>>>
>>>>>>> Yours,
>>>>>>> James.
>>>>>>>
>>>
Quite - that's exactly my point about possibilities of optimisation - lots
of options for how to do so. But all those require re-architecting of
existing underlying 'stuff' to enable it. (Batch DRC already uses worker
threads, by the way, for some types of rules, but not currently for the
length /
Hi Glen,
Yes I've already raised the (potential) issue of the real-time computation
cost of the length tuning rules - it's essentially an O(MxN) algorithm (M =
number of rules, N = number of PCB items), which does worry me from a
scaling point of view as people hopefully develop more complex board
Hi Glen,
Yes I've already raised the (potential) issue of the real-time computation
cost of the length tuning rules - it's essentially an O(MxN) algorithm (M =
number of rules, N = number of PCB items), which does worry me from a
scaling point of view as people hopefully develop more complex board
Hi Glen,
For what it's worth, I do agree that the editability / organisation of
rules could do with some evolution. It's definitely a topic of live
discussion on the issues! But the tuning tools is orthogonal to whatever
does or doesn't happen in that space; the starting premise is that the DRC
ru
grasp.
> What I needed was effective end-to-end length tuning of 16+ bit bus across
> different networks and through some damper resistors. I hope you can come
> up
> with a more user friendly UI for things like that :)
>
> Best regards,
> Oleg Endo
>
> On Fri, 2024-03-01 at 07:
'like this product does'. It's all good information to feed the
design process though.
Yours,
James.
On Fri, 1 Mar 2024 at 02:50, Oleg Endo wrote:
> Hi,
>
> On Mon, 2024-02-26 at 19:03 +, 'James Jackson' via KiCad Developers
> wrote:
> >
> > 2.
n the Zulip Chat, but have changed my email address fairly
> recently. Is it possible to get a new link please?
>
> Please contact me off-list, the list hides your email address.
>
> Best,
> Jon
>
> On Mon, Feb 26, 2024 at 2:03 PM 'James Jackson' via KiCad Develope
Hi all,
I contributed a bit back before the v6 and v7 releases, but due to a new
job and moving house I had to take a step back from development. I've got
some time available again, and the 8.0.0 release has spurred me on again. I
would like to work on some features for 9.00, primarily around tool
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