Hal Murray via devel writes:
> Can you say more. Is there any good Intel documentation that says "Xeon v3
> and up"?
Not that I know of, although it's surely buried inside some file
someplace on ARK.
> Or anything that describes which families or chips will/won't do what
> I want?
The trouble
Thanks.
> That's an IvyBridge I think, you will want Haswell or later.
> Haswell and later are OK (Xeon v3 and up) AFAIK
Can you say more. Is there any good Intel documentation that says "Xeon v3
and up"?
Or anything that describes which families or chips will/won't do what I want?
My search p
Hal Murray via devel writes:
> Does anybody have access to server class systems?
Not with bare metal Linux at the moment…
> I'm trying to setup a test environment for the thread work. Dell high end
> workstations use Xeon chips. I have a T5610, but it has TSC warp so doesn't
> use the TSC for
On 3/10/21 8:25 PM, Hal Murray via devel wrote:
Does anybody have access to server class systems? Or know somebody who can
run a quick test for me?
[ 0.00] tsc: Fast TSC calibration using PIT
[ 0.00] tsc: Detected 2100.063 MHz processor
[ 0.481983] TSC deadline timer available
Yo Hal!
On Wed, 10 Mar 2021 17:25:26 -0800
Hal Murray via devel wrote:
> Just run "dmesg | grep tsc -i" If you get the 3 lines above, it's warped.
None of mine:
> You can get the CPU chip from /proc/cpuinfo
model name : AMD Ryzen 5 3600 6-Core Processor
model name : Intel(R) Core(T
Does anybody have access to server class systems? Or know somebody who can
run a quick test for me?
Long story.
I'm trying to setup a test environment for the thread work. Dell high end
workstations use Xeon chips. I have a T5610, but it has TSC warp so doesn't
use the TSC for timekeeping
