Re: TSC warp, Threads

2021-03-12 Thread Achim Gratz via devel
Hal Murray via devel writes: > Can you say more. Is there any good Intel documentation that says "Xeon v3 > and up"? Not that I know of, although it's surely buried inside some file someplace on ARK. > Or anything that describes which families or chips will/won't do what > I want? The trouble

Re: TSC warp, Threads

2021-03-12 Thread Hal Murray via devel
Thanks. > That's an IvyBridge I think, you will want Haswell or later. > Haswell and later are OK (Xeon v3 and up) AFAIK Can you say more. Is there any good Intel documentation that says "Xeon v3 and up"? Or anything that describes which families or chips will/won't do what I want? My search p

Re: ntpq meets log files

2021-03-12 Thread Hal Murray via devel
>>> I think you would need to deglobalize some variables first. > >> What do you have in mind? > I tend to overfocus on early optimizations and other trivial things. Neither > of the arguments passed to read_clockstatus from the converted mockup is > used, instead, the variable res_associd is pul