On Mon, Jun 16, 2025 at 01:46:59 +0200, Hector Cao wrote:
> Hello,
>
> A friendly ping,
>
> To fix this issue, I would like to propose this solution.
> Here is the draft patch, I can submit a proper one in a separate mail if we
> can reach an agreement
> on this solution.
>
> Thanks !
>
> diff
Hello,
A friendly ping,
To fix this issue, I would like to propose this solution.
Here is the draft patch, I can submit a proper one in a separate mail if we
can reach an agreement
on this solution.
Thanks !
diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 0f7eb8f48b..570160c18f 100644
I just realized that I should not modify the x86_features.xml file
directly.
I have to fix this issue elsewhere, probably in
the sync_qemu_features_i386.py
script or in the libvirt code that reads the MSRs registers.
QEMU specifies vmx-apicv-xapic as 1st bit of the register 0x48B
(IA32_VMX_PROC
