On 27/6/24 09:10, Philippe Mathieu-Daudé wrote:
Deprecate SD spec v1.10, use v3.01 as new default.
Philippe Mathieu-Daudé (3):
hw/sd/sdcard: Deprecate support for spec v1.10
hw/sd/sdcard: Use spec v3.01 by default
The first 2 patches are already merged,
hw/sd/sdcard: Remove support
On 1/9/25 09:41, Philippe Mathieu-Daudé wrote:
On 1/9/25 09:29, Philippe Mathieu-Daudé wrote:
Kind ping :)
On 27/6/24 09:10, Philippe Mathieu-Daudé wrote:
Support for spec v1.10 was deprecated in QEMU v9.1.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 6
On 1/9/25 09:29, Philippe Mathieu-Daudé wrote:
Kind ping :)
On 27/6/24 09:10, Philippe Mathieu-Daudé wrote:
Support for spec v1.10 was deprecated in QEMU v9.1.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 6 --
docs/about/removed-features.rst | 5
Kind ping :)
On 27/6/24 09:10, Philippe Mathieu-Daudé wrote:
Support for spec v1.10 was deprecated in QEMU v9.1.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 6 --
docs/about/removed-features.rst | 5 +
include/hw/sd/sd.h | 1 -
hw
On 28/8/25 16:37, Philippe Mathieu-Daudé wrote:
mipssim machine (single user of mipsnet device) is
deprecated since v10.0; remove for 10.2.
Philippe Mathieu-Daudé (2):
hw/mips: Remove mipssim machine
hw/net: Remove mipsnet device model
Series queued.
mipssim machine (single user of mipsnet device) is
deprecated since v10.0; remove for 10.2.
Philippe Mathieu-Daudé (2):
hw/mips: Remove mipssim machine
hw/net: Remove mipsnet device model
MAINTAINERS | 6 -
docs/about/deprecated.rst | 12 -
docs
The mipsnet device model was only used by the mipssim machine,
which just got removed. Remove as now dead code.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 5 -
hw/net/mipsnet.c| 297
hw/net/Kconfig | 3 -
hw/net
The "mipssim" machine is deprecated since commit facfc943cb9
("hw/mips: Mark the "mipssim" machine as deprecated"), released
in v10.0; time to remove.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 1 -
docs/about/depr
ed machine
types
docs/about/removed-features: auto-generate a note for versioned
machine types
include/hw/boards: add warning about changing deprecation logic
Series (on top on Thomas pc-q35-4.1 removal):
Tested-by: Philippe Mathieu-Daudé
On 8/5/25 12:23, Daniel P. Berrangé wrote:
On Thu, May 08, 2025 at 12:21:20PM +0200, Philippe Mathieu-Daudé wrote:
On 8/5/25 10:53, Daniel P. Berrangé wrote:
On Thu, May 08, 2025 at 09:45:50AM +0200, Thomas Huth wrote:
On 06/05/2025 18.00, Daniel P. Berrangé wrote:
When VERSION is set to a
On 8/5/25 10:53, Daniel P. Berrangé wrote:
On Thu, May 08, 2025 at 09:45:50AM +0200, Thomas Huth wrote:
On 06/05/2025 18.00, Daniel P. Berrangé wrote:
When VERSION is set to a development snapshot (micro >= 50), or a release
candidate (micro >= 90) we have an off-by-1 in determining deprecation
On 29/4/25 11:32, Daniel P. Berrangé wrote:
On Tue, Apr 29, 2025 at 11:20:59AM +0200, Thomas Huth via Devel wrote:
On 29/04/2025 10.23, Markus Armbruster wrote:
...
I don't wish to derail this thread, but we've been dancing around the
question of how to best fix the target for some time. I thi
On 29/4/25 10:23, Markus Armbruster wrote:
Pierrick Bouvier writes:
On 4/28/25 4:07 AM, Markus Armbruster wrote:
Peter Krempa writes:
So what should libvirt do once multiple targets are supported?
How do we query CPUs for each of the supported targets?
It's kind of a similar question w
On 28/4/25 13:07, Markus Armbruster wrote:
Peter Krempa writes:
The second thing that libvirt does after 'query-version' is
'query-target'.
So what should libvirt do once multiple targets are supported?
How do we query CPUs for each of the supported targets?
Will the result be the same if
Cc'ing Pierrick
On 30/5/24 09:45, Philippe Mathieu-Daudé wrote:
We are trying to unify all qemu-system-FOO to a single binary.
In order to do that we need to remove QAPI target specific code.
@dump-skeys is only available on qemu-system-s390x. This series
rename it as @dump-s390-skey, m
ping for trivial review?
On 8/11/24 16:43, Philippe Mathieu-Daudé wrote:
When a property value is static (not provided by QMP or CLI),
error shouldn't happen, otherwise it is a programming error.
Therefore simplify and use &error_abort as this can't fail.
Reported-by: Richard Hen
On 4/2/25 14:52, Peter Maydell wrote:
On Tue, 4 Feb 2025 at 13:40, Philippe Mathieu-Daudé wrote:
On 4/2/25 12:13, Peter Maydell wrote:
On Tue, 4 Feb 2025 at 09:57, Daniel P. Berrangé wrote:
IMHO we can have distinct machines for each model, but
*NOT* have further machines for each RAM size
On 4/2/25 12:13, Peter Maydell wrote:
On Tue, 4 Feb 2025 at 09:57, Daniel P. Berrangé wrote:
On Tue, Feb 04, 2025 at 10:51:04AM +0100, Philippe Mathieu-Daudé wrote:
On 4/2/25 10:22, Peter Maydell wrote:
On Tue, 4 Feb 2025 at 00:23, Philippe Mathieu-Daudé wrote:
All previous raspi
On 4/2/25 10:57, Daniel P. Berrangé wrote:
On Tue, Feb 04, 2025 at 10:51:04AM +0100, Philippe Mathieu-Daudé wrote:
On 4/2/25 10:22, Peter Maydell wrote:
On Tue, 4 Feb 2025 at 00:23, Philippe Mathieu-Daudé wrote:
All previous raspi machines can be created using the
generic machine. Deprecate
On 4/2/25 10:22, Peter Maydell wrote:
On Tue, 4 Feb 2025 at 00:23, Philippe Mathieu-Daudé wrote:
All previous raspi machines can be created using the
generic machine. Deprecate the old names to maintain
a single one. Update the tests.
Signed-off-by: Philippe Mathieu-Daudé
diff --git a
Add the 'max_ramsize' field to the soc_property[] array,
corresponding to the maximum DRAM size a SoC can map.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/a
://github.com/raspberrypi/documentation/blob/9b126446a5/documentation/asciidoc/computers/raspberry-pi/revision-codes.adoc
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 86ecc988e06..234655
All previous raspi machines can be created using the
generic machine. Deprecate the old names to maintain
a single one. Update the tests.
Signed-off-by: Philippe Mathieu-Daudé
---
QOM HMP introspection test fails because without the 'model'
argument set, no machine is created...
$ q
-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index b184ac3c446..8cae1ff6f93 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -445,7 +445,7 @@ static void
Add a property to specify the board revision. This allows to
create a Raspberry Pi 2B with BCM2836 SoC (rev 1.0 and 1.1)
or BCM2837 (rev 1.2 up to 1.5).
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 39 +++
1 file changed, 39 insertions(+)
diff
The generic 'raspi' machine takes a 'model' argument and
create the machine associated with the model, with the
RAM size requested (or default to the minimum of 256MB
if not precised).
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2797
Signed-off-by: Philippe Mathieu
Raspberry Pi 'B' models have an ethernet chipset (the LAN9512).
Since we don't yet model it, add a /* TODO */ comment.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
in
Expand the current type2model array to include the processor id.
Since the BCM2838 is indistinctly used as BCM2711 (within the
Linux community), add it as alias in RaspiProcessorId.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 33 +++--
1 file changed
Since callers already have reference to the RaspiBaseMachineClass,
directly pass 'board_rev' as argument to raspi_base_machine_init().
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/raspi_platform.h | 2 +-
hw/arm/raspi.c | 8 +++-
2 files changed, 4
Merge Raspi4bMachineState within RaspiMachineState by
using an unnamed union.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 3fa382d62ce..ef94d57dab5 100644
Except we alter the device tree blob, the 4B
is just another raspi model.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 114 -
hw/arm/raspi4b.c | 136 -
hw/arm/meson.build | 2 +-
3 files
We shouldn't access a QOM parent object directly.
Use the appropriate type-cast macro.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi.c | 2 +-
hw/arm/raspi4b.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index a7a662
aspi.c (more is planned here
with the MPCore refactor [2]).
Regards,
Phil.
[1] https://lore.kernel.org/qemu-devel/20250201091528.1177-1-phi...@linaro.org/
[2] https://lore.kernel.org/qemu-devel/20231212162935.42910-1-phi...@linaro.org/
Philippe Mathieu-Daudé (12):
hw/arm/raspi: Access SoC pa
wrote:
On Sat, 1 Feb 2025, Philippe Mathieu-Daudé wrote:
- Deprecate the 'raspi4b' machine name, renaming it as
'raspi4b-1g' on 32-bit hosts, 'raspi4b-2g' otherwise.
- Add the 'raspi4b-4g' and 'raspi4b-8g' machines, with
respectively 4GB
On 1/2/25 10:15, Philippe Mathieu-Daudé wrote:
On 32-bit hosts, rename 'raspi4b' -> 'raspi4b-1g' to clarify the
machine has 1GB of RAM.
On 64-bit hosts, rename 'raspi4b' -> 'raspi4b-2g'.
Keep the 'raspi4b' alias but deprecate it.
Add the raspi4b-8g machine, a raspi4b rev1.5 with 8GB of RAM.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi4b.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index 2cf8bc467c5..2120bc1a6f8 100644
--- a/hw/arm/raspi4b.c
+++ b
Add the raspi4b-4g machine, a raspi4b rev1.4 with 4GB of RAM.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2797
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi4b.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index
There is no particular reason to not have the raspi4b-1g machine
available on 64-bit hosts, so expose it there.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi4b.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index
On 32-bit hosts, rename 'raspi4b' -> 'raspi4b-1g' to clarify the
machine has 1GB of RAM.
On 64-bit hosts, rename 'raspi4b' -> 'raspi4b-2g'.
Keep the 'raspi4b' alias but deprecate it.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/
memory.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi4b.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index 548059f6d69..4ea79ec7092 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -107,26
In preparation of adding more machines based on the raspi4,
introduce TYPE_RASPI4_MACHINE. Remove TYPE_RASPI4B_MACHINE
definitions, declaring the machine name in place via the
MACHINE_TYPE_NAME("raspi4b") macro.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi4b.c | 16 +
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. Since
we are going to add more machines, convert type_init()
by DEFINE_TYPES().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/raspi4b.c | 19 ---
1 file changed, 8
- Deprecate the 'raspi4b' machine name, renaming it as
'raspi4b-1g' on 32-bit hosts, 'raspi4b-2g' otherwise.
- Add the 'raspi4b-4g' and 'raspi4b-8g' machines, with
respectively 4GB and 8GB of DRAM.
Philippe Mathieu-Daudé (7):
hw/arm/raspi4b
pat.c | 18 --
1 file changed, 18 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
/removed-features.rst | 4 +-
docs/interop/firmware.json | 2 +-
hw/i386/pc_piix.c | 95 -
qemu-options.hx | 10 ++--
5 files changed, 8 insertions(+), 110 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 17/1/25 11:27, Thomas Huth wrote:
While our new auto-disablement of old machine types will only kick
in with the next (v10.1) release, the pc-i440fx-2.* machine types
have been explicitly marked as deprecated via our old deprecation
policy mechanism before (two releases ago), so it should be f
On 5/11/24 23:27, Philippe Mathieu-Daudé wrote:
On 5/11/24 23:24, Philippe Mathieu-Daudé wrote:
On 5/11/24 14:04, Philippe Mathieu-Daudé wrote:
All these MemoryRegionOps read() and write() handlers are
implemented expecting 32-bit accesses. Clarify that setting
.impl.min/max_access_size fields
On 20/12/24 09:50, Marc-André Lureau wrote:
Hi
On Thu, Dec 19, 2024 at 7:39 PM Philippe Mathieu-Daudé
wrote:
'vmcore-info' object allow to transition from '-device'
to 'object', following the deprecation process.
Is there a strong motivation behind thi
On 19/12/24 17:59, Daniel P. Berrangé wrote:
On Thu, Dec 19, 2024 at 04:38:51PM +0100, Philippe Mathieu-Daudé wrote:
Follow the assumed QOM type definition style, prefixing with 'TYPE_'.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/vmcoreinfo.h | 6 +++---
hw/misc/vm
On 19/12/24 16:57, Daniel P. Berrangé wrote:
On Thu, Dec 19, 2024 at 04:38:47PM +0100, Philippe Mathieu-Daudé wrote:
No reason for vmcoreinfo to be based on QDev, since it
doesn't use any QDev API. Demote to plain Object.
I'm not especially convinced by that rationale, at least in
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 5
docs/about/removed-features.rst | 5
include/hw/misc/vmcoreinfo.h| 3 +--
hw/misc/vmcoreinfo.c| 44 ++---
4 files changed, 13 insertions(+), 44 deletions
'-device vmcoreinfo' is replaced by '-object vmcore-info'.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 5 +
1 file changed, 5 insertions(+)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index d6809f94ea1..57a3d734081 100
'vmcore-info' object allow to transition from '-device'
to 'object', following the deprecation process.
No need to modify VMCoreInfoState since DeviceState
already inherits from Object state.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/vmcoreinfo.h
In preparation of implementing a UserCreatable callback
in the next commit, factor vmcoreinfo_device_realize() out.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/vmcoreinfo.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/hw/misc/vmcoreinfo.c b/hw/misc
In order to simplify the next commit,
move vmstate_vmcoreinfo[] around.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/vmcoreinfo.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c
index 093bede655e
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/vmcoreinfo.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c
index 9822615cfed..093bede655e 100644
--- a/hw/misc/vmcoreinfo.c
+++ b/hw/misc/vmcoreinfo.c
@@ -26,9 +26,9
Follow the assumed QOM type definition style, prefixing with 'TYPE_'.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/vmcoreinfo.h | 6 +++---
hw/misc/vmcoreinfo.c | 8
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/hw/misc/vmco
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/vmcoreinfo.h | 13 ++---
hw/misc/vmcoreinfo.c | 16 +---
2 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/include/hw/misc/vmcoreinfo.h b/include/hw/misc/vmcoreinfo.h
index 0b7b55d400a
Both QEMUResetHandler and FWCfgWriteCallback take an opaque
pointer argument, no need to cast.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/vmcoreinfo.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c
index
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/vmcoreinfo.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c
index 833773ade52..84b211e9117 100644
--- a/hw/misc/vmcoreinfo.c
+++ b/hw/misc/vmcoreinfo.c
No reason for vmcoreinfo to be based on QDev, since it
doesn't use any QDev API. Demote to plain Object.
Since we can only register one type, introduce a new
one for object: 'vmcore-info' (dash separator), keeping
'vmcoreinfo' device during the deprecation period.
P
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/removed-features.rst | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst
index e3a87f3f555..cb1388049a8 100644
--- a/docs/about/removed
TCG trace-events were deprecated before the v6.2 release,
and removed for v7.0.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/removed-features.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst
Use the same style for deprecated / removed commands.
Signed-off-by: Philippe Mathieu-Daudé
---
docs/about/deprecated.rst | 2 +-
docs/about/removed-features.rst | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
Philippe Mathieu-Daudé (3):
docs: Correct '-runas' and '-fsdev/-virtfs proxy' indentation
docs: Correct release of TCG trace-events removal
docs: Replace 'since' -> 'removed in' in removed-features.rst
docs/about/deprecated.rst |
+Michal for Linux driver
On 5/11/24 23:08, Edgar E. Iglesias wrote:
On Tue, Nov 05, 2024 at 02:04:21PM +0100, Philippe Mathieu-Daudé wrote:
Per the datasheet (reference added in file header, p.9)
'Programming Model' -> 'Register Data Types and Organization':
&quo
On 11/11/24 07:56, Thomas Huth wrote:
On 08/11/2024 16.43, Philippe Mathieu-Daudé wrote:
Introduce an abstract machine parent class which defines
the 'little_endian' property. Duplicate the current machine,
which endian is tied to the binary endianness, to one big
endian and a lit
On 8/11/24 16:05, Paolo Bonzini wrote:
On 11/8/24 16:43, Philippe Mathieu-Daudé wrote:
The Xilinx 'ethlite' device was added in commit b43848a100
("xilinx: Add ethlite emulation"), being only built back
then for a big-endian MicroBlaze target (see commit 72b675caac
"
On 11/11/24 07:57, Thomas Huth wrote:
On 08/11/2024 16.43, Philippe Mathieu-Daudé wrote:
Copy/paste the current tests, but call the opposite endianness
machines, testing:
- petalogix-s3adsp1800-le machine (little-endian CPU) on the
qemu-system-microblaze binary (big-endian)
- petalogix
Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/ssi/xilinx_spips.h | 1 +
hw/arm/xilinx_zynq.c | 1 +
hw/ssi/xilinx_spips.c | 36 ++-
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/include/hw/ssi/xilinx_spips.h b/
ach binary.
'petalogix-s3adsp1800' machine is aliased as:
- 'petalogix-s3adsp1800-be' on big-endian binary,
- 'petalogix-s3adsp1800-le' on little-endian one.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/microblaze/petalogix_s3adsp1800_mmu
All callers of do_load() / do_store() set MO_TE flag.
Set it once in the callees.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/translate.c | 36 +++
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a
Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/char/xilinx_uartlite.c| 33 ++--
hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 +
2 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
index
).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
.../functional/test_microblaze_s3adsp1800.py | 21 +++
.../test_microblazeel_s3adsp1800.py | 19 +
2 files changed, 40 insertions(+)
diff --git a/tests/functional
changes will help when adding cross-endian kernel tests.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
tests/functional/test_microblaze_s3adsp1800.py | 6 +++---
tests/functional/test_microblazeel_s3adsp1800.py | 6 +++---
2 files changed, 6 insertions(+), 6 deletions
Consider the CPU ENDI bit, swap instructions when the CPU
endianness doesn't match the binary one.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/cpu.h | 7 +++
target/microblaze/translate.c | 5 +++--
2 files changed, 10 insertions(
mo_endian() returns the target endianness, currently static.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/translate.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/translate.c b/target
ned-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/microblaze/translate.c | 36 +--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/transla
When a property value is static (not provided by QMP or CLI),
error shouldn't happen, otherwise it is a programming error.
Therefore simplify and use &error_abort as this can't fail.
Reported-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/xlnx
Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/xlnx-zynqmp.c | 4
hw/ssi/xilinx_spi.c | 24 +++-
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index ab2d50e31b..e735dbdf82 100644
--- a/hw/arm/xln
Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/microblaze/petalogix_ml605_mmu.c | 1 +
hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 +
hw/ppc/virtex_ml507.c| 1 +
hw/timer/xilinx_timer.c | 35 +++-
4 files changed, 25 inserti
Allow down to 8-bit access, per the datasheet (reference added
in previous commit):
"Timer Counter registers are accessed as one of the following types:
• Byte (8 bits)
• Half word (2 bytes)
• Word (4 bytes)"
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
esired,
removing the need of tswap().
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device endianness,
defaulting to little endian.
Set the proper endianness on the single machine using the device.
S
Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/xilinx_intc.c| 52 +---
hw/microblaze/petalogix_ml605_mmu.c | 1 +
hw/microblaze/petalogix_s3adsp1800_mmu.c | 1 +
3 files changed, 40 insertions(+), 14 deletions(-)
diff --git a/hw/intc/xilinx_i
Pass vCPU endianness as argument so we can load kernels
with different endianness (different from the qemu-system-binary
builtin one).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Reviewed-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Richard Henderson
All these MemoryRegionOps read() and write() handlers are
implemented expecting 32-bit accesses. Clarify that setting
.impl.min/max_access_size fields.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20241105130431.22564-8-phi...@linaro.org>
---
h
the
CPU endianness is exposed by the 'ENDI' bit).
Next step: Look at unifying binaries.
Please review,
Phil.
Philippe Mathieu-Daudé (17):
hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit
hw/microblaze: Propagate CPU endianness to microblaze_load_kernel()
hw/i
On 7/11/24 11:01, Richard Henderson wrote:
On 11/7/24 01:22, Philippe Mathieu-Daudé wrote:
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little e
On 7/11/24 10:27, Richard Henderson wrote:
On 11/7/24 01:22, Philippe Mathieu-Daudé wrote:
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little e
changes will help when adding cross-endian kernel tests.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
tests/functional/test_microblaze_s3adsp1800.py | 6 +++---
tests/functional/test_microblazeel_s3adsp1800.py | 6 +++---
2 files changed, 6 insertions(+), 6 deletions
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the proper endianness on the single machine using the
device.
Signed-off-by: Philip
).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
.../functional/test_microblaze_s3adsp1800.py | 21 +++
.../test_microblazeel_s3adsp1800.py | 19 +
2 files changed, 40 insertions(+)
diff --git a/tests/functional
ach binary.
'petalogix-s3adsp1800' machine is aliased as:
- 'petalogix-s3adsp1800-be' on big-endian binary,
- 'petalogix-s3adsp1800-le' on little-endian one.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
hw/microblaze/petalogix_s3adsp1800_mmu
Consider the CPU ENDI bit, swap instructions when the CPU
endianness doesn't match the binary one.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/cpu.h | 7 +++
target/microblaze/translate.c | 5 +++--
2 files changed, 10 insertions(
mo_endian() returns the target endianness, currently static.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/translate.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/translate.c b/target
All callers of do_load() / do_store() set MO_TE flag.
Set it once in the callees.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/translate.c | 36 +++
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a
ned-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
---
target/microblaze/translate.c | 36 +--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/transla
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the proper endianness on the single machine using the
device.
Signed-off-by: Philip
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the proper endianness on the single machine using the
device.
Signed-off-by: Philip
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the proper endianness for each machine using the device.
Signed-off-by: Philippe Mat
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