Hi,
So I've tested with all the comments below and everything seems to be
working fine, so no issues there. I will re-post RSN.
Thanks,
On 8/6/21 8:42 AM, Ard Biesheuvel via groups.io wrote:
On Thu, 5 Aug 2021 at 18:36, Jeremy Linton wrote:
Since we plan on toggling between XHCI and PCI
y.w...@arm.com ;
samer.el-haj-mahm...@arm.com ; Jeremy Linton
Subject: [edk2-devel] [PATCH 3/5] Platform/RaspberryPi: Add PCIe SSDT
Since we plan on toggling between XHCI and PCI the PCI
root needs to be in its own SSDT. This is all thats needed
of UEFI. The SMC conduit is provided directly to
on behalf of Jeremy Linton
via groups.io
Sent: Thursday, August 5, 2021 7:35 PM
To: devel@edk2.groups.io
Cc: p...@akeo.ie ; ardb+tianoc...@kernel.org
; Andrei Warkentin ;
sunny.w...@arm.com ; samer.el-haj-mahm...@arm.com
; Jeremy Linton
Subject: [edk2-devel] [PATCH 3/5] Platform/RaspberryPi:
On Thu, 5 Aug 2021 at 18:36, Jeremy Linton wrote:
>
> Since we plan on toggling between XHCI and PCI the PCI
> root needs to be in its own SSDT. This is all thats needed
> of UEFI. The SMC conduit is provided directly to the running
> OS. When the OS detects this PCIe port, on a machine without
>
Since we plan on toggling between XHCI and PCI the PCI
root needs to be in its own SSDT. This is all thats needed
of UEFI. The SMC conduit is provided directly to the running
OS. When the OS detects this PCIe port, on a machine without
a MADT it attempts to connect to the SMC conduit. The RPi
defin
