PR created - https://github.com/tianocore/edk2/pull/5513
LGTM but I can't check it against UPL.
@Dong, Guo Would you be able to take a look please'?
On Wed, 4 Oct 2023 at 21:02, MrChromebox wrote:
> Fixes serial output on platforms using coreboot and a non-default
> clock rate such as AMD Pic
Fixes serial output on platforms using coreboot and a non-default
clock rate such as AMD Picasso and newer Zen-based platforms.
Signed-off-by: Matt DeVillier
Change-Id: I91290397852176754e9a34ec6e5829044f41d15a
---
UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c | 5 +
UefiPayload
