Since ACPI is well supported on SynQuacer platform, set ACPI as
default hardware description.
Only changing the "DEFAULT" flags from ACPIPREF_DT to ACPIPREF_ACPI
does not work as expected, this commit also replaces the value
of ACPIPREF_DT and ACPIPREF_ACPI.
Signed-off-by: Masah
Hi Sami,
On Thu, 14 Jul 2022 at 17:01, Sami Mujawar wrote:
>
> Hi Masahisa,
>
> Please find my response inline marked [SAMI].
>
> Regards,
>
> Sami Mujawar
>
> On 14/07/2022 07:38 am, Masahisa Kojima wrote:
> > Hi Sami,
> >
> > Platform/Soci
/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
Thanks,
Masahisa Kojima
On Wed, 13 Jul 2022 at 22:19, PierreGondois wrote:
>
> Hi Sami,
> I think
>Silicon/NXP/NxpQoriqLs.dsc.inc
> al
Hi Leif, Ard,
A gentle ping again on this.
Thanks,
Masahisa Kojima
On Mon, 23 May 2022 at 13:58, Masahisa Kojima via groups.io
wrote:
>
> Hi Leif, Ard,
>
> A gentle ping on this on behalf of Masami, since he left Linaro.
>
> Thanks,
> Masahisa Kojima
>
>
> On Fri
Hi Leif, Ard,
A gentle ping on this on behalf of Masami, since he left Linaro.
Thanks,
Masahisa Kojima
On Fri, 10 Dec 2021 at 15:51, Masami Hiramatsu
wrote:
>
> Add DBG2 table to ACPI tables. The COM1 uart port will be used
> for OS debug, and it is 16550 compatible.
>
> Signed
Hi Ard, Leif,
On Tue, 10 May 2022 at 17:25, Masahisa Kojima via groups.io
wrote:
>
> From: Kazuhiko Sakamoto
>
> Support 4-bytes address for erase and write, so that we can
> access whole region of SPI-NOR Flash(64MiB) implemented on the
> Developerbox.
>
> This com
SPINOR_OP_BE and SPINOR_OP_BE_4B.
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlash.h | 4 ++--
Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlash.c | 13 +
2 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/Silicon/Socionext
cy, StMM
outputs the following log output.
===
CommBuffer - 0xFC85CC90, CommBufferSize - 0x52
!!! DEPRECATED INTERFACE !!! VariableLockRequestToLock() will go away soon!
!!! DEPRECATED INTERFACE !!! Please move to use Variable Policy!
!!! DEPRECATED INTERFACE !!! Variable:
Hi Ard,
Thank you for your review.
On Tue, 30 Nov 2021 at 20:39, Ard Biesheuvel wrote:
>
> Hello Masahisa,
>
> Thanks for this patch.
>
> On Tue, 30 Nov 2021 at 09:37, Masahisa Kojima
> wrote:
> >
> > This commit adds the SMBIOS type 17 table support for
storing SPD. It requires 2KB, 512bytes * 4 DIMMs.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Masami Hiramatsu
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/SynQuacer.dec | 3 +
Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc
This commit adds the standalone MM build instruction
to enable UEFI secure boot.
Signed-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/Readme.md | 35
1 file changed, 35 insertions(+)
diff --git a/Platform/Qemu/SbsaQemu/Readme.md b/Platform/Qemu/SbsaQemu/Readme.md
Fix typo in Readme.md
Signed-off-by: Masahisa Kojima
Reviewed-by: Leif Lindholm
---
Platform/Qemu/SbsaQemu/Readme.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Qemu/SbsaQemu/Readme.md b/Platform/Qemu/SbsaQemu/Readme.md
index 50f61b6e3bf4..cef98383884a 100644
ether with "/reserved-memory" parsing implementation newly added
in this commit, pre-existing "/memory" node parsing is moved to
a helper function in FdtHelperLib.
Signed-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 25
Add the build infrastructure for compilation of StandaloneMm image.
SbsaQemu.fdf is modified to extend the FLASH0 region enough big to
contain StandaloneMM image(BL32).
Signed-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc | 132
Platform/Qemu
blank line updates
v2:
- get aligned to the tf-a update, it supports 512 cores
and memory map is updated.
Masahisa Kojima (4):
SbsaQemu: Build infrastructure for StandaloneMm image
SbsaQemu: add MM based UEFI secure boot support
SbsaQemu: add standalone MM build instruction
SbsaQemu
On Tue, 2 Mar 2021 at 02:22, Leif Lindholm wrote:
>
> On Mon, Mar 01, 2021 at 14:19:50 +0900, Masahisa Kojima wrote:
> > This implements support for UEFI secure boot on SbsaQemu using
> > the standalone MM framework. This moves all of the software handling
> > of the UEF
On Tue, 2 Mar 2021 at 23:13, Leif Lindholm wrote:
>
> On Tue, Mar 02, 2021 at 21:45:26 +0900, Masahisa Kojima wrote:
> > Hi Leif,
> >
> > Thank you for you comments.
> >
> > On Tue, 2 Mar 2021 at 02:05, Leif Lindholm wrote:
> > >
> > > O
Hi Leif,
Thank you for you comments.
On Tue, 2 Mar 2021 at 02:05, Leif Lindholm wrote:
>
> On Mon, Mar 01, 2021 at 14:19:49 +0900, Masahisa Kojima wrote:
> > Add the build infrastructure for compilation of StandaloneMm image.
> >
> > Signed-off-by: Masahisa Kojim
Fix typo in Readme.md
Signed-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/Readme.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Qemu/SbsaQemu/Readme.md b/Platform/Qemu/SbsaQemu/Readme.md
index cdee8b41507e..abee24df0e9d 100644
--- a/Platform/Qemu/SbsaQemu
This commit adds the standalone MM build instruction
to enable UEFI secure boot.
Signed-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/Readme.md | 35
1 file changed, 35 insertions(+)
diff --git a/Platform/Qemu/SbsaQemu/Readme.md b/Platform/Qemu/SbsaQemu
ned-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 43 +++---
.../Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc| 39 +
Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 82 +--
.../Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf| 7 +-
.../Library/S
Add the build infrastructure for compilation of StandaloneMm image.
Signed-off-by: Masahisa Kojima
---
.../Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc| 132 ++
Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 6 +-
.../Qemu/SbsaQemu/SbsaQemuStandaloneMm.fdf| 93
This patch series implment the UEFI secure boot on SbsaQemu.
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Graeme Gregory
Cc: Radoslaw Biernacki
Cc: Shashi Mallela
v2:
- get aligned to the tf-a update, it supports 512 cores
and memory map is updated.
Masahisa Kojima (4):
SbsaQemu: Build
On Wed, 17 Feb 2021 at 01:15, Graeme Gregory wrote:
>
> On 16/02/2021 11:35, Masahisa Kojima wrote:
> > Hi Ard,
> >
> > I am encountering strange behavior when I apply this patch
> > "SbsaQemu: add MM based UEFI secure boot support".
> > When I star
sses UEFI secure variable through Standalone MM, secondary cores
boot fails. I don't come up with any possible reason.
# As a reference, there is no issue on Developerbox.
Do you have any idea about this error?
Thanks,
Masahisa
On Mon, 21 Dec 2020 at 21:52, Masahisa Kojima
wrote:
>
> Thi
x platform, this patch renames
the Emmc.c.
Suggested-by: Leif Lindholm
Cc: Pierre Gondois
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 +-
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/{Emmc.c => EmmcDxe.c} | 0
2 files changed
d system
> > generate a .amli file for each .asl file. If there is no Emmc.amli
> > in your Build directory, this might be the reason.
> >
> > Regards,
> > Pierre
> >
> > -Original Message-
> > From: devel@edk2.groups.io On Behalf Of Masahis
essage-
> From: devel@edk2.groups.io On Behalf Of PierreGondois
> Sent: 2020年7月28日 1:10
> To: devel@edk2.groups.io; Gao, Liming ; Leif Lindholm
> ; Masahisa Kojima
> Cc: Sami Mujawar ; Tomas Pilar ;
> Feng, Bob C ; Ard Biesheuvel
> Subject: Re: [edk2-devel] [PATCH v5 4/5]
Best Regards,
>
> Leif
>
> On Fri, Jul 17, 2020 at 19:09:10 +0900, Masahisa Kojima wrote:
> > This patches add the ACPI description of MMIO TPM on SynQuacer.
> > This also fixes the non CRLF line endings of Acpi.dsc.inc.
> >
> > Masahisa Kojima (2):
> >
option is not enabled, existing linux
SPI driver is used instead of MMIO TPM.
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/Acpi.dsc.inc| 7 ++-
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 14 ++
2 files changed, 20 insertions(+), 1 deletion(-)
diff
This patches add the ACPI description of MMIO TPM on SynQuacer.
This also fixes the non CRLF line endings of Acpi.dsc.inc.
Masahisa Kojima (2):
Silicon/SynQuacer: add ACPI descriptor of MMIO TPM
Silicon/SynQuacer: CRLF fixup for Acpi.dsc.inc
Silicon/Socionext/SynQuacer/Acpi.dsc.inc
All of line endings of Acpi.dsc.inc are not CRLF, resolve this.
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/Acpi.dsc.inc | 94 ++--
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Acpi.dsc.inc
b/Silicon/Socionext
heck the secure varstore implementation.
On Sat, 13 Jun 2020 at 01:20, Ard Biesheuvel wrote:
>
> On 6/12/20 1:51 AM, Masahisa Kojima via groups.io wrote:
> > Add the build infrastructure for compilation of StandaloneMm image.
> > This is a preparation for StandaloneMm RAS featu
Add the build infrastructure for compilation of StandaloneMm image.
This is a preparation for StandaloneMm RAS feature implementation
on the SBSA Qemu platform.
Signed-off-by: Masahisa Kojima
---
Platform/Qemu/SbsaQemu/SbsaQemuStandaloneMm.dsc | 134
Platform/Qemu/SbsaQemu
it also bothers user application with phy address management.
With that, we encapsulate the phy address into NETSEC SDK.
Signed-off-by: Masahisa Kojima
Reviewed-by: Leif Lindholm
---
Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c
| 10
.
This patch adds link state check with 5s timeout in NetsecDxe
initialization. The timeout value can be adjustable via
configuration file.
Signed-off-by: Masahisa Kojima
---
Platform/Socionext/DeveloperBox/DeveloperBox.dsc| 1 +
Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe
/environment dependent issue by temporarily
putting phy in loopback mode, then we can expect the stable RXCLK input.
Signed-off-by: Masahisa Kojima
---
Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc.c
| 72
Silicon/Socionext
This patch series is bugfix for the hang-up issue in Netsec driver.
Some linux distributions such as Ubuntu power down the ethernet phy
in reboot. In this case, Netsec initialization fails and
system hungs.
This patch series add the robust netsec initialization,
set ethernet phy as loopback mode
state check with 5s timeout in NetsecDxe
initialization. The timeout value can be adjustable via
configuration file.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
Platform/Socionext/DeveloperBox/DeveloperBox.dsc| 1 +
Silicon/Socionext/SynQuacer/Drivers/Net
issue by temporarily
putting phy in loopback mode, then we can expect the stable RXCLK input.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc.c
| 72
Silicon/Socionext
- updated comment
- removed unrelated whitespace changes
Masahisa Kojima (3):
NetsecDxe: embed phy address into NETSEC SDK internal structure
NetsecDxe: put phy in loopback mode to guarantee stable RXCLK input
NetsecDxe: SnpInitialize() waits for media linking up
.../Socionext
application with phy address management.
With that, we encapsulate the phy address into NETSEC SDK.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
Reviewed-by: Leif Lindholm
---
Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c
On Wed, 24 Jul 2019 at 01:14, Leif Lindholm wrote:
>
> On Mon, Jul 22, 2019 at 08:56:36PM +0900, Masahisa Kojima wrote:
> > The latest NetsecDxe requires issueing phy reset at the
> > last stage of initialization to safely exit loopback mode.
> > However, as a result, it t
state check with 5s timeout in NetsecDxe
initialization. The timeout value can be adjustable via
configuration file.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
.../Socionext/DeveloperBox/DeveloperBox.dsc | 1 +
.../Drivers/Net/NetsecDxe/NetsecDxe.c | 232
issue by temporarily
putting phy in loopback mode, then we can expect the stable RXCLK input.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
.../netsec_sdk/src/ogma_misc.c| 72 ++-
.../netsec_for_uefi/netsec_sdk/src/ogma_reg.h | 4 ++
2 files
application with phy address management.
With that, we encapsulate the phy address into NETSEC SDK.
Signed-off-by: Masahisa Kojima
Signed-off-by: Satoru Okamoto
---
.../Drivers/Net/NetsecDxe/NetsecDxe.c | 10 +--
.../Drivers/Net/NetsecDxe/NetsecDxe.h | 2 -
.../netsec_sdk
to expect stable RXCLK,
and wait for media link up.
The disadvantage of this patch series is that user has to wait
several seconds until netsec driver gives up ethernet link-up
if the ethernet cable is not connected.
Masahisa Kojima (3):
NetsecDxe: embed phy address into NETSEC SDK internal
Hi Ard,
On Tue, 11 Jun 2019 at 22:01, Ard Biesheuvel wrote:
>
> On Tue, 11 Jun 2019 at 14:18, Masahisa Kojima
> wrote:
> >
> > This adds the SMBIOS type 17 table support for Developerbox platform.
> > The SPDs on a I2C bus is only accessible by the SCP, so SCP-firm
: Masahisa Kojima
---
.../Socionext/DeveloperBox/DeveloperBox.dsc | 3 +
.../DeveloperBox/DeveloperBox.dsc.inc | 2 +-
.../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 494 +-
.../SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 2 +
Silicon/Socionext/SynQuacer
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