Hi All,
I'm including EFI drivers for an Intel Network card, but this adds a huge
delay in the system startup when the ports are being initialized (the
server has several slots). The network cards will be used only for PXE boot
during the staging/setup process, so I'm thinking of adding a configur
Looks like for Guo's patch SMMSTORE driver is not needed since it
implements a SpiFlashLib for accessing the SPI Flash controller (via
hardware sequencer) of Intel CPU targets...
But this is for Universal Payload only right? I guess coreboot supports
only the non-universal mode.
This stuff was test
I have filed a bug report:
https://bugzilla.tianocore.org/show_bug.cgi?id=3585
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#79776): https://edk2.groups.io/g/devel/message/79776
Mute This Topic: https://groups.io/mt/84196221/21656
Group
I have filed a bug report:
https://bugzilla.tianocore.org/show_bug.cgi?id=3586
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#79775): https://edk2.groups.io/g/devel/message/79775
Mute This Topic: https://groups.io/mt/85088671/21656
Group
Hi All,
This patch broke the coreboot payload loading. Tested with:
build -a IA32 -a X64 -p UefiPayloadPkg/UefiPayloadPkg.dsc -b RELEASE -t
GCC5 -D BOOTLOADER=COREBOOT
Basically the coreboot cbfstool reports the following error when creating
the CBFS / flash image:
"Not a usable UEFI firmware vol
Hi,
The following commit broke the UefiPayloadPkg build:
commit d63595c3c91624f258f291adee329724edeac12e (HEAD)
Author: Zhiguang Liu
Date: Sun Apr 25 15:50:46 2021 +0800
UefiPayloadPkg: Update the function definition of HobConstructor
Environment: GCC5 / openSUSE 15.x
build -a IA32 -a
For anyone having this issue,the below patch detects the error in PciHostBridge
aperture, from 9elements github repository:
https://github.com/9elements/edk2-1/commit/6be829a631e3e0e7f6043c88cfef33f9a0588298
also available in system76 repo: https://github.com/system76/edk2.git
commit cf6caab535
On Fri, Jul 3, 2020 at 11:30 AM, Andrew Fish wrote:
>
> At the same time, the platform's PciHostBridgeLib instance reported a
> root bridge with an MMIO aperture at [D400, FE10), with
> capabilities 1.
>
> This is a conflict. The capabilities don't even matter (we don't even
> check whet
Hi,
When booting UefiPayloadPkg in my system (x86 Denverton SoC, coreboot) an
assert error is generated in the PciHostBridgeDxe driver.
In the InitializePciHostBridge() function if all ASSERT's are ignored (by
commenting out the code) the boot can move further on until it reaches the UEFI
Shell
