REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4868
In current PCIE Resizable BAR feature, add below check:
1. Check Register Number of Resizable BARs is legal.
2. Check Register Register BAR Index is legal.
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 +
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 19 ---
MdeModulePkg/MdeModulePkg.dec| 5 +
3 files changed, 22 insertions(+), 3
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 +
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 25 +---
MdeModulePkg/MdeModulePkg.dec| 5
3 files changed, 28 insertions(+), 3
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4868
In current PCIE Resizable BAR feature, add below check:
1. Check Register Number of Resizable BARs is legal.
2. Check Register Register BAR Index is legal.
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516
1) Add CXL 3.0 header file to comply with CXL 3.0 specification
2) CXL 3.0 header will embed Cxl20.h
3) Updated Cxl.h to point to 3.0 header file
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
Cc: Chris Li
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516
1) Add CXL 3.0 header file to comply with CXL 3.0 specification
2) CXL 3.0 header will embed Cxl20.h
3) Updated Cxl.h to point to 3.0 header file
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
Cc: Chris Li
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4515
Add PCI_EXPRESS_EXTENDED_CAPABILITY_DESIGNATED_VENDOR_SPECIFIC_ID
0x0023 in PciExpress40.h
Signed-off-by: Foster Nong
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Ray Ni
---
MdePkg/Include/IndustryStandard/PciExpress40.h | 2 ++
1 file
Package/Module: MdePkg/Include
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4515
Add PCI_EXPRESS_EXTENDED_CAPABILITY_DESIGNATED_VENDOR_SPECIFIC_ID
0x0023 in PciExpress40.h
Signed-off-by: Foster Nong
---
MdePkg/Include/IndustryStandard/PciExpress40.h | 2 ++
1 file changed, 2 insertions
ber usage to avoid
wasting Bus Numbers
So the issue can be fixed with below code change.
PciIoDevice->ReservedBusNum = (UINT16)(EFI_PCI_BUS_OF_RID (LastVF) -
Bus);
https://bugzilla.tianocore.org/show_bug.cgi?id=4069
Signed-off-by: Foster Nong
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnume
>ReservedBusNum - TempReservedBusNum), SubBusNumber);
The solution is add a new flag IsAriEnabled to help handle this case.
if ARI is enabled, then TempReservedBusNum will not be reset again
during all functions(1-255) scan with checking flag IsAriEnabled.
Signed-off-by: Foster Nong
---
MdeModulePkg
Bus + 1);
}
https://bugzilla.tianocore.org/show_bug.cgi?id=4069
Signed-off-by: Foster Nong
---
.../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
b/MdeModulePkg
to handle this case.
Signed-off-by: Foster Nong
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index 63d149b3b8c0..a89f912de85b 10
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