Thank you all for your support. :)
-Dat
-Original Message-
From: Cheng, Gao
Sent: Sunday, March 10, 2024 9:46 PM
To: Wu, Hao A ; Dat Mach ; gaoliming
; devel@edk2.groups.io
Cc: Ni, Ray
Subject: RE: [PATCH] MdeModulePkg/Xhci: Skip another size round up for TRB
address translation
Exte
Hi Gao and Hao,
Could you please take a look at my patch and see if anything I might have
missed?
Thanks,
Dat
-Original Message-
From: gaoliming
Sent: Monday, March 4, 2024 4:34 PM
To: Dat Mach ; devel@edk2.groups.io
Cc: gao.ch...@intel.com; hao.a...@intel.com; ray...@intel.com
Subjec
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560
Commit f36e1ec1f0a5fd3be84913e09181d7813444b620 had fixed the DXE_ASSERT
caused by the TRB size round up from 16 to 64 for most cases.
However, there is a remaining case that the TRB size is also rounded up
during setting TR dequeue pointer
