Reviewed-by: Jiewen Yao
> -Original Message-
> From: Gerd Hoffmann
> Sent: Wednesday, April 24, 2024 2:00 PM
> To: devel@edk2.groups.io
> Cc: Oliver Steffen ; Gerd Hoffmann
> ; Ard Biesheuvel ; Yao, Jiewen
> ; Srikanth Aithal
> Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load dr
The VirtHstiDxe does not work in confidential guests. There also isn't
anything we can reasonably test, neither flash storage nor SMM mode will
be used in that case. So just skip driver load when running in a
confidential guest.
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Fixes: 506740982bba ("OvmfPkg/V
Hi Gerd,
AMD version is not work for IA32X64 ovmf.
I checked the detailed: CpuSaveState->x64 is always used for OVMF no matter
IA32 or X64, while AMD is not, which is decided by the MSR EFER_ADDRESS LMA bit
check.
There is a potential issue/open in OVMF why need use the X64 CpuSaveState for
I
Hi Gerd and Ard,
Can I submit the V2 this week? I want all OvmfPkg changes to be meged
before the 202405 feature freeze.
Thanks,
Chao
On 2024/4/22 17:21, Chao Li wrote:
Hi Ard,
Could you take a look at this patch set and give you some suggestions?
On 2024/4/17 18:01, Chao Li wrote:
Hi G
Thanks @gaoliming for the reviewed-by, I've updated the RB info into PR and add
push label.
https://github.com/tianocore/edk2/pull/5579
Thanks,
Gua
-Original Message-
From: gaoliming
Sent: Tuesday, April 23, 2024 10:42 PM
To: devel@edk2.groups.io; Guo, Gua
Cc: 'Rebecca Cran' ; Feng, Bo
Reviewed-by: Zhichao Gao
Thanks,
Zhichao
From: Giri Mudusuru
Sent: Tuesday, April 23, 2024 11:55 PM
To: devel@edk2.groups.io; ellie.le...@arm.com
Cc: Gao, Zhichao ; Giri Mudusuru
Subject: Re: [EXTERNAL] [edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add
Type 45 entry to query table
Review
For the most part, OVMF will clear the encryption bit for MMIO regions,
but there is currently one known exception during SEC when the APIC
base address is accessed via MMIO with the encryption bit set for
SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special
handling on the hypervis
I think patch 6 can be updated to introduce unified PI specification versioning
macros without incrementing the minor revision,
by changing PI_SPECIFICATION_MINOR_REVISION back to 70.
This will ensure compliance with the versioning schema introduced in PI 1.7B
without changing the PI support leve
Hi Gerd,
There was the issue in my patch to change the smm access driver:
SmmAccessPeiOpen(), I removed below code due to the comment in original code
that indicate the DescriptorIndex is not considered at all:
...
if (DescriptorIndex >= DescIdxCount) {
return EFI_INVALID_PARAMETER;
}
On 4/23/2024 8:01 PM, Gerd Hoffmann wrote:
On Tue, Apr 23, 2024 at 07:14:04PM +0530, Aithal, Srikanth wrote:
Correcting.
On 4/23/2024 7:09 PM, Aithal, Srikanth wrote:
Hello,
Todays OVMF/edk2 master branch is breaking AMD SEV-ES guest boot with
OvmfX64 package, where as sev-es guest boots fin
The type field value is currently undefined for type 45 SMBIOS tables
in smbiosview. An entry is added in the query table to display the
correct value for type 45 tables.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733
Cc: Zhichao Gao
Signed-off-by: Ellie Lewis
---
ShellPkg/Librar
Correcting.
On 4/23/2024 7:09 PM, Aithal, Srikanth wrote:
Hello,
Todays OVMF/edk2 master branch is breaking AMD SEV-ES guest boot with
OvmfX64 package, where as sev-es guest boots fine with AmdSev package.
Git bisect pointed to below commit as bad, going back to previous
commit i.e ddc43e7a
Entry added to display info type entry in smbiosview for Type 45 tables
as defined in SMBIOS Specification 3.5.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733
The changes can be seen at:
https://github.com/ellielewisarm/edk2/tree/type45_typefield
Cc: Zhichao Gao
Ellie Lewis (1):
Add changes to print PMIC and RCD details of Smbios Type17 in Shell
smbiosview command
Signed-off-by: Shenbagadevi R
---
.../UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/Pr
Hi Liming,
What is the patch review status? Can this patch be merged?
-Original Message-
From: Nong, Foster
Sent: Wednesday, December 27, 2023 2:05 PM
To: gaoliming ; devel@edk2.groups.io; Kinney, Michael
D ; 'Chris Li'
Cc: Ni, Ray
Subject: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl3
Entry added to display info type entry in smbiosview for Type 45 tables
as defined in SMBIOS Specification 3.5.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733
The changes can be seen at:
https://github.com/ellielewisarm/edk2/tree/type45_typefield
Cc: Zhichao Gao
Ellie Lewis (1):
From: sahil
In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.
This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.
Signed-off-by:
From: sahil
This driver enables Fault Tolerant Write protocol, which provides
fault tolerant write capability for block devices.
Signed-off-by: sahil
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 +
2 files changed, 6 insertions(+)
diff --git a/P
The type field value is currently undefined for type 45 SMBIOS tables
in smbiosview. An entry is added in the query table to display the
correct value for type 45 tables.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4733
Cc: Zhichao Gao
Signed-off-by: Ellie Lewis
---
ShellPkg/Librar
From: sahil
Enable persistent storage on QSPI flash device.
Signed-off-by: sahil
---
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 2 ++
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
From: sahil
This patch adds an optional functionality in NorFlashDxe to fetch and
print NOR Flash information from NorFlashInfoLib using its JEDEC ID.
NOR Flash libraries will implement a function "NorFlashReadID" which
will fetch and return JEDEC ID. This JEDEC ID can be then used to
print NOR
From: sahil
NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.
This patch adds the following major changes:
1. Adds changes in N
From: sahil
NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.
This patch splits NorFlash.h and moves out the function prototypes
From: sahil
This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.
Signed-off
From: sahil
Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.
Signed-off-by: sahil
---
S
From: sahil
Refactoring done in this patch has two major parts:
1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.
2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions wh
From: sahil
Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.
Signed-off-by: sahil
---
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 34 ++
Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c | 65
+
From: sahil
Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 129
Platform/ARM/Drivers/NorFlashDxe/NorFlashBloc
From: sahil
This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf |
From: sahil
This patch implements functions to interact with P30 NOR Flash.
The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
file.
Signed-off-by: sahil
---
Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf | 35 +
Platform/ARM/Library/P30NorFlashDeviceLib/P3
From: sahil
Moving this function from NorFlash.c to NorFlashDxe.c as it is not
dependent on any particular flash implementation.
Signed-off-by: sahil
---
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h| 14 +++
Platform/ARM/Drivers/NorFlashDxe/NorFlash.c| 44
Platf
From: sahil
This patch series adds the following changes:
1. Splits the NorFlashDxe driver to introduce a NorFlashDeviceLib that
implements the specifics for the respective flash. This will allow us
to plug different libraries implementing functionality of various NOR
Flash. The flash specific c
*** BLURB HERE ***
praveensankarn (1):
Subject: MdePkg:Added new SPCR table stucture members as in
Rev4.
.../IndustryStandard/SerialPortConsoleRedirectionTable.h| 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
--
2.38.1.windows.1
-The information contained in this message ma
In SPCR table, 4 structure members have been added newly as per
SPCR table Rev4, which has to be added in
MdePkg/SerialPortConsoleRedirectionTable.h file.
Signed-off-by: Praveen Sankar N praveensank...@ami.com
Cc: michael.d.kin...@intel.com
Cc: gaolim...@byosoft.com.cn
Cc: zhiguang@intel.com
C
Except for Patch 6/7, others are good to me. Reviewed-by: Liming Gao
I suggest to merge others first. The patch 6/7 to update PI version from 1.7
to 1.8 can be discussed first.
Thanks
Liming
> -邮件原件-
> 发件人: Sachin Ganesh
> 发送时间: 2024年4月20日 5:46
> 收件人: devel@edk2.groups.io
> 抄送: gaolim.
Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Guo, Gua
> 发送时间: 2024年4月22日 9:50
> 收件人: devel@edk2.groups.io
> 抄送: gua@intel.com; Rebecca Cran ; Liming Gao
> ; Bob Feng ; Yuwei Chen
>
> 主题: [edk2-devel] [PATCH v1 1/1] BaseTools/Fmmt.py: Python 3.12 support
>
> From:
Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Guo, Gua
> 发送时间: 2024年4月21日 20:51
> 收件人: devel@edk2.groups.io
> 抄送: gua@intel.com; saloni.kasbe...@intel.com; Rebecca Cran
> ; Liming Gao ; Bob Feng
> ; Yuwei Chen
> 主题: [edk2-devel] [PATCH v1 1/1] BaseTools/GetUtcDateT
Signed-off-by: Leif Lindholm
---
p.s. Mike, could you add write access for Marcin in this repo as well?
It was a pure oversight not to ask this at the same time as for
edk2-platforms.
Maintainers.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Maintainers.txt b/Maintainer
On 4/18/2024 11:43 PM, Ni, Ray wrote:
So this is just junk unallocated memory that we are reporting as
a type it *could* be if an allocation occurs to minimize failures
of ExitBootServices. Which is questionable. But in terms of
attributes, I would expect we either have this unallocated
memory
On Tue, Apr 23, 2024 at 07:14:04PM +0530, Aithal, Srikanth wrote:
> Correcting.
>
> On 4/23/2024 7:09 PM, Aithal, Srikanth wrote:
> > Hello,
> >
> > Todays OVMF/edk2 master branch is breaking AMD SEV-ES guest boot with
> > OvmfX64 package, where as sev-es guest boots fine with AmdSev package.
> >
More info:
I quick dump the SMRAM info with original SmmAccess implementation, it's same
as I produced in the gEfiSmmSmramMemoryGuid HOB.
SmmAccess:
SmmAccessPeiEntryPoint: SMRAM map follows, 2 entries
SmmAccessPeiEntryPoint: 7F00 1000
7F00
Seemly, this is an incompatible change. What's impact with this change?
Thanks
Liming
> -邮件原件-
> 发件人: Praveen Sankar N
> 发送时间: 2024年4月22日 19:26
> 收件人: devel@edk2.groups.io
> 抄送: michael.d.kin...@intel.com; gaolim...@byosoft.com.cn;
> zhiguang@intel.com; Felix Polyudov ; Srinivasan Man
Seemly, there is no other comments. I create PR
https://github.com/tianocore/edk2/pull/5585 to merge it.
Thanks
Liming
> -邮件原件-
> 发件人: Nong, Foster
> 发送时间: 2024年4月23日 18:07
> 收件人: gaoliming ; devel@edk2.groups.io;
> Kinney, Michael D ; 'Chris Li'
>
> 抄送: Ni, Ray
> 主题: RE: [edk2-devel]
>
> > +SmramHobDescriptorBlock =
> (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
>
> > +SmramHobDescriptorBlock->Descriptor[0].PhysicalStart =
> PlatformInfoHob->LowMemory - TsegSize;
> > +SmramHobDescriptorBlock->Descriptor[0].CpuStart =
> PlatformInfo
As I documented in the comment:
This patch provides the SmmRelocationLib library instance
for OVMF to handle the logic difference, and it won't change
the existing implementation code logic.
But as I said, it depends on you. I will drop the OvmfPkg/SmmRelocationLib
since confirmed we can use the
On Tue, Apr 23, 2024 at 12:25:55 +0200, Marcin Juszkiewicz wrote:
> QEMU v9 uses 1GHz frequency for generic timers as required for Arm v8.6+
> cpu cores. TF-A was hardcoding 62.5MHz value which is used for older
> designs. Now it will use value present in CNTFRQ_EL0 register (set by
> QEMU).
>
> E
QEMU v9 uses 1GHz frequency for generic timers as required for Arm v8.6+
cpu cores. TF-A was hardcoding 62.5MHz value which is used for older
designs. Now it will use value present in CNTFRQ_EL0 register (set by
QEMU).
Enable FEAT_ECV for QEMU v9.0+ to get access to CNTPOFF register.
Signed-off-b
Hi,
> +Name (RBUF, ResourceTemplate() {
> +Memory32Fixed (ReadWrite,
> + FixedPcdGet32 (PcdPlatformXhciBase),
> + FixedPcdGet32 (PcdPlatformXhciSize))
> +Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive)
Hi Heinrich,
Yes. A new release candidate shall be published after review and upstream of
the patches.
Will further send an update.
With Warm Regards,
Edhay
> -Original Message-
> From: Heinrich Schuchardt
> Sent: Tuesday, April 23, 2024 12:46 AM
> To: G Edhaya Chandran
> Cc: alex
On Fri, Apr 19, 2024 at 11:21:46AM -0700, Adam Dunlap wrote:
> Ensure that when a #VC exception happens, the instruction at the
> instruction pointer matches the instruction that is expected given the
> error code. This is to mitigate the ahoi WeSee attack [1] that could
> allow hypervisors to brea
Hi,
> +Hob.Raw = BuildGuidHob (
> +&gEfiSmmSmramMemoryGuid,
> +BufferSize
> +);
> +SmramHobDescriptorBlock =
> (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
> +SmramHobDescriptorBlock->Descriptor[0].Physica
On Tue, Apr 23, 2024 at 07:31:18AM +, Wu, Jiaxin wrote:
> Thanks Gerd, I will try the S3 on OVMF.
>
> And for AmdSmmRelocationLib usage in OVMF, do you prefer:
> 1. use the AmdSmmRelocationLib directly in this patch set? Or
> 2. still keep the original to create the OvmfPkg/SmmRelocationLib, a
[AMD Official Use Only - General]
> -Original Message-
> From: Nickle Wang
> Sent: Tuesday, April 23, 2024 3:09 PM
> To: Igor Kulchytskyy ; Chang, Abner
> ; devel@edk2.groups.io
> Cc: Nick Ramirez
> Subject: RE: [EXTERNAL] RE: [edk2-redfish-client][PATCH] RedfishClientPkg:
> introduce Re
Thanks Gerd, I will try the S3 on OVMF.
And for AmdSmmRelocationLib usage in OVMF, do you prefer:
1. use the AmdSmmRelocationLib directly in this patch set? Or
2. still keep the original to create the OvmfPkg/SmmRelocationLib, and clean
the code in the future patch?
Both are fine to me, depends
Hi Igor, Abner,
Thanks for your review. Please allow me to answer your questions together.
> 1. We suppose acquire the credential before we start to communicate with
> Redfish. Will Redfish credential driver create another bootstrap account here
> after provisioning?
No, according to the Redfis
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