Hi Gerd,
Thanks,
Chao
On 2024/3/14 19:28, Gerd Hoffmann wrote:
On Mon, Mar 11, 2024 at 05:38:06PM +0800, Chao Li wrote:
Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can
Hi Gerd,
This email was not send by EDK2 community, but other emails which you
send were by EDK2 community, I don't know what happened. Regardless,
I'll respond your question about this changes via this email.
Here is my comments:
Thanks,
Chao
On 2024/3/14 18:59, Gerd Hoffmann wrote:
Hi
Hi Gerd,
Thanks,
Chao
On 2024/3/14 19:22, Gerd Hoffmann wrote:
Hi,
+[Sources.LoongArch64]
+ LoongArch/DxeExceptionLib.c
+ LoongArch/ExceptionCommon.h
+ LoongArch/ExceptionCommon.c
+ LoongArch/LoongArch64/ArchExceptionHandler.c
+ LoongArch/LoongArch64/ExceptionHandlerAsm.S | GCC
Hmm,
Hi Gerd,
Thanks,
Chao
On 2024/3/14 18:52, Gerd Hoffmann wrote:
Hi,
[LibraryClasses]
BaseLib
+ CcExitLib
+ CpuLib
+ DebugAgentLib
+ HobLib
LocalApicLib
MemoryAllocationLib
- HobLib
+ MicrocodeLib
MtrrLib
- CpuLib
- UefiBootServicesTableLib
- DebugAgentLib
- Synch
> On 14. Mar 2024, at 15:45, Oliver Smith-Denny
> wrote:
>
> This does not appear to be the case with MSVC built binaries. I am
> seeing that VirtualSize is the size of the data-initialized part of the
> section.
What? :( So you are saying modern MSVC generates PEs that either have
non-contig
The GCD EFI_MEMORY_UC and EFI_MEMORY_WC memory attributes will be
supported when Svpbmt extension available.
Cc: Gerd Hoffmann
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Ray Ni
Signed-off-by: Tuan Phan
---
.../Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 106 ++
.../BaseRiscVMmuLib/
Define the BIT 2 as the override bit for Svpbmt extension. This will
be used by RISC-V MMU library to support EFI_MEMORY_UC and
EFI_MEMORY_WC.
Cc: Liming Gao
Cc: Michael D Kinney
Cc: Zhiguang Liu
Reviewed-by: Laszlo Ersek
Signed-off-by: Tuan Phan
---
MdePkg/MdePkg.dec | 2 ++
1 file changed,
While UINTN defined for RISC-V 64 bits is UINT64, explictly using UINT64
for those variables that clearly are UINT64.
Cc: Gerd Hoffmann
Cc: Laszlo Ersek
Cc: Rahul Kumar
Cc: Ray Ni
Signed-off-by: Tuan Phan
---
.../Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 158 +-
1 file chan
Disable Svpbmt extension as QEMU not enables it in default config.
Cc: Andrei Warkentin
Cc: Ard Biesheuvel
Cc: Gerd Hoffmann
Cc: Jiewen Yao
Cc: Sunil V L
Reviewed-by: Laszlo Ersek
Signed-off-by: Tuan Phan
---
OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 2 +-
1 file changed, 1 insertion(+), 1 del
This series adds support for RISC-V Svpbmt extension.
The GCD EFI_MEMORY_UC and EFI_MEMORY_WC attributes will
be mapped to IO and NC mode defined in PBMT field.
v4:
- Changed UINTN to UINT64.
- Fixed format error.
- Addressed Andrei's comment.
v3:
- Addressed Laszlo's comments.
v2:
- Ge
On Thu, 14 Mar 2024 at 15:52, gaoliming via groups.io
wrote:
>
> For this patch set, I have no comments. Reviewed-by: Liming Gao
>
>
Merged as #5471
> > -邮件原件-
> > 发件人: Oliver Smith-Denny
> > 发送时间: 2024年3月10日 3:06
> > 收件人: devel@edk2.groups.io
> > 抄送: Leif Lindholm ; Ard Biesheuvel
On Thu, 14 Mar 2024 at 15:46, Oliver Smith-Denny
wrote:
>
> Thanks for the review!
>
I'll queue this up, along with the other series Liming just acked.
>
> On 3/14/2024 7:43 AM, gaoliming wrote:
> > Sorry for the late response. I think this is a good clean up. Reviewed-by:
> > Liming Gao
> >
>
On Wed, 6 Mar 2024 at 12:42, Marcin Juszkiewicz
wrote:
>
> From: Xiong Yining
>
> Provide functions to check for memory information:
>
> - amount of memory nodes
> - memory address
> - NUMA node id for memory
>
> Values are read from TF-A using platform specific SMC calls.
>
> Signed-off-by: Xion
On Wed, 6 Mar 2024 at 12:42, Marcin Juszkiewicz
wrote:
>
> There is no need for EDK2 to know that there is DeviceTree around.
> All hardware information is read using functions from
> SbsaQemuHardwareInfoLib library.
>
> Library fallbacks to parsing DT if needed.
>
I'd prefer to have only a singl
On Wed, 6 Mar 2024 at 12:42, Marcin Juszkiewicz
wrote:
>
> During platform initialization we read amount of cpu cores and set
> PcdCoreCount so there is no need to call FdtHandler.
>
How can you be sure that that code executes first?
> Signed-off-by: Marcin Juszkiewicz
> ---
> Platform/Qemu/Sb
On Thu, 14 Mar 2024 at 16:09, Ard Biesheuvel wrote:
>
> On Wed, 6 Mar 2024 at 12:42, Marcin Juszkiewicz
> wrote:
> >
> > This library provides functions to check for hardware information.
> > For now it covers CPU ones:
> >
> > - amount of cpu cores
> > - MPIDR value for cpu core
> > - NUMA node
On Wed, 6 Mar 2024 at 12:42, Marcin Juszkiewicz
wrote:
>
> We read it once and store in Pcd for future use.
>
> Signed-off-by: Marcin Juszkiewicz
> ---
> .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +++-
> .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
On Wed, 6 Mar 2024 at 12:42, Marcin Juszkiewicz
wrote:
>
> This library provides functions to check for hardware information.
> For now it covers CPU ones:
>
> - amount of cpu cores
> - MPIDR value for cpu core
> - NUMA node id for cpu core
>
> Values are read from TF-A using platform specific SMC
Introduce SecureBoot driver to support
/redfish/v1/Systems/SYS/SecureBoot resource.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
---
.../RedfishClientComponents.dsc.inc | 2 +
RedfishClientPkg/RedfishClientLibs.dsc.inc| 4 +
.../SecureBoot
-Release Etag and PendingSettingUri resources.
-Update function header for GetHttpResponseEtag() and
GetHttpResponseLocation(). Caller has to release returned
memory buffer from these two functions.
Signed-off-by: Nickle Wang
Cc: Abner Chang
Cc: Igor Kulchytskyy
Cc: Nick Ramirez
---
.../Featu
For this patch set, I have no comments. Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: Oliver Smith-Denny
> 发送时间: 2024年3月10日 3:06
> 收件人: devel@edk2.groups.io
> 抄送: Leif Lindholm ; Ard Biesheuvel
> ; Sami Mujawar ;
> Liming Gao
> 主题: [edk2-devel][PATCH v3 0/3] Fix Runtime Granularity Issues
>
Following the discussion at [1] and as the ArmLib relies on them,
move ArmPkg/Chipset/ArmV7[|Mmu].h files to the MdePkg.
Update the path to correctly include the moved files.
[1] https://edk2.groups.io/g/devel/message/111566
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Sami Mujawar
Cc: Michael D
Following the discussion at [1] and as the ArmLib relies on them,
move ArmPkg/Chipset/AArch64[|Mmu].h files to the MdePkg.
Update the path to correctly include the moved files.
[1] https://edk2.groups.io/g/devel/message/111566
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hof
v2:
- Move files to MdePkg/Include/Register/ instead of MdePkg/Include/
This patch relies on [1].
Following the RFC v1: ArmPkg,MdePkg: move ArmLib.h to MdePkg [1],
move the Chipset/* files to the MdePkg as the Armlib.h relies on
them.
These patches span over multiple packages as these Chipset/*
This change is good to me. Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Joey Vagedes
> via groups.io
> 发送时间: 2024年3月13日 23:15
> 收件人: devel@edk2.groups.io
> 抄送: Rebecca Cran ; Liming Gao
> ; Bob Feng ; Yuwei Chen
>
> 主题: [edk2-devel] [PATCH v1 1/1] BaseTools: InfBuildD
Hi Marvin,
Thanks for looking at this. Since sending out the v1, I have done a lot
more digging into our PE loader, others, the spec, and differences
between MSVC and our ElfConvert tool. I agree that my understanding was
flawed in my original comments.
On 3/14/2024 2:57 AM, Marvin Häuser wrote:
Sorry for the late response. I think this is a good clean up. Reviewed-by:
Liming Gao
> -邮件原件-
> 发件人: Oliver Smith-Denny
> 发送时间: 2024年2月15日 7:20
> 收件人: devel@edk2.groups.io
> 抄送: Leif Lindholm ; Ard Biesheuvel
> ; Sami Mujawar ;
> Liming Gao ; Sean Brogan
> ; Ard Biesheuvel
> 主题: [edk2-
Reviewed-by: Liming Gao
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 sunceping
> 发送时间: 2024年2月27日 5:19
> 收件人: devel@edk2.groups.io
> 抄送: Ceping Sun ; Liming Gao
> ; Michael D Kinney
> ; Erdem Aktas ;
> James Bottomley ; Jiewen Yao ;
> Min Xu ; Tom Lendacky
> ; Michael Roth ;
> Isaku Yamahata
W dniu 14.03.2024 o 15:17, Marcin Juszkiewicz via groups.io pisze:
We want to stop parsing DeviceTree (in EDK2) to gather hardware information.
Instead we ask TF-A for those details using SMC calls. On real hardware
platform it could be asking on-board Embedded Controller.
Hardware information
We want to stop parsing DeviceTree (in EDK2) to gather hardware information.
Instead we ask TF-A for those details using SMC calls. On real hardware
platform it could be asking on-board Embedded Controller.
Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together
with new cod
From: Ian Chiu
https://bugzilla.tianocore.org/show_bug.cgi?id=4727
More and more XHCI host controllers require to have extra 1ms
delay before accessing any MMIO register during reset.
Since PHY transition from P3 to P0 can take around 1.3ms and
the xHCI reset can take around 1.5ms.
Hence, need
I agree that not all bits make sense to virtual machine.
However, I do see some bits should be there if we really want to add HSTI to
report security propery.
Please take a look at the HSTI spec -
https://learn.microsoft.com/en-us/windows-hardware/test/hlk/testref/hardware-security-testability-s
On Mon, Mar 11, 2024 at 05:38:13PM +0800, Chao Li wrote:
> Added PcdCpuExceptionVectorBaseAddress use for storing the CPU exception
> vector base address. This PCD can be be populated at build time or
> changed at runtime.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Acked-by: Gerd
On Mon, Mar 11, 2024 at 05:38:06PM +0800, Chao Li wrote:
> Add a new header file CpuMmuLib.h, whitch is referenced from
> ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
> LoongArch64 is added, and more architectures can be accommodated in the
> future.
>
> BZ: https://bugzilla.tia
Hi,
> +[Sources.LoongArch64]
> + LoongArch/DxeExceptionLib.c
> + LoongArch/ExceptionCommon.h
> + LoongArch/ExceptionCommon.c
> + LoongArch/LoongArch64/ArchExceptionHandler.c
> + LoongArch/LoongArch64/ExceptionHandlerAsm.S | GCC
Hmm, if all code is in an arch-specific subdirectory anyway ye
On Mon, Mar 11, 2024 at 02:37:55AM -0700, Chao Li wrote:
> Some of the order is not in alphabetical, reorder.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726
>
> Cc: Ray Ni
> Cc: Rahul Kumar
> Cc: Gerd Hoffmann
> Signed-off-by: Chao Li
Acked-by: Gerd Hoffmann
-=-=-=-=-=-=-=-=
Hi,
> + if ((BaseFreq == 0x0) || (ClockMultiplier == 0x0) || (ClockDivide == 0x0))
> {
> +DEBUG ((
> + DEBUG_ERROR,
> + "LoongArch Stable Timer is not available in the CPU, hence this
> library cannot be used.\n"
> + ));
> +ASSERT (FALSE);
> +CpuDeadLoop ();
> + }
Hi,
> [LibraryClasses]
>BaseLib
> + CcExitLib
> + CpuLib
> + DebugAgentLib
> + HobLib
>LocalApicLib
>MemoryAllocationLib
> - HobLib
> + MicrocodeLib
>MtrrLib
> - CpuLib
> - UefiBootServicesTableLib
> - DebugAgentLib
> - SynchronizationLib
>PcdLib
> - CcExitLib
> -
On Mon, Mar 11, 2024 at 05:37:34PM +0800, Chao Li wrote:
> Some of the order is not in alphabetical, reorder.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726
>
> Cc: Ray Ni
> Cc: Rahul Kumar
> Cc: Gerd Hoffmann
> Signed-off-by: Chao Li
Acked-by: Gerd Hoffmann
-=-=-=-=-=-=-=-=
On Mon, Mar 11, 2024 at 05:37:29PM +0800, Chao Li wrote:
> Some of the order is not in alphabetical, reorder.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726
>
> Cc: Ray Ni
> Cc: Rahul Kumar
> Cc: Gerd Hoffmann
> Signed-off-by: Chao Li
Acked-by: Gerd Hoffmann
-=-=-=-=-=-=-=-=
On Fri, Mar 08, 2024 at 07:31:11AM -0800, Lendacky, Thomas via groups.io wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
>
> In preparation for running under an SVSM at VMPL1 or higher (higher
> numerically, lower privilege), re-organize the way a page state change
> is performed
On Fri, Mar 08, 2024 at 07:30:56AM -0800, Lendacky, Thomas via groups.io wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
>
> The SNP_PAGE_STATE_MAX_ENTRY is based on the number of entries that can
> fit in the GHCB shared buffer. As a result, the SNP_PAGE_STATE_CHANGE_INFO
> struc
On Fri, Mar 08, 2024 at 09:29:45AM -0600, Tom Lendacky wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
>
> The PVALIDATE instruction is used to change the SNP validation of a page,
> but that can only be done when running at VMPL0. To prepare for running at
> a less priviledged VM
On Fri, Mar 08, 2024 at 09:29:43AM -0600, Tom Lendacky wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
>
> Add initial support for the new AmdSvsmLib library to OvmfPkg. The initial
> implementation fully implements the library interfaces.
>
> The SVSM presence check, AmdSvsmIsSv
Question: What is the value to provide an *empty* HSTI table?
IMHO, If the goal is to perform some security check, I think we need provide a
*real* HSTI table.
Thank you
Yao, Jiewen
> -Original Message-
> From: Konstantin Kostiuk
> Sent: Thursday, March 14, 2024 6:25 PM
> To: devel@edk
Good day everyone,
Sorry for interjecting, but I’d like to avoid premature changes to PE code that
would only make the current mess even worse.
> On 4. Mar 2024, at 20:24, Oliver Smith-Denny wrote:
>
> I relooked at the spec, you are correct, SizeOfRawData is aligned to
> the FileAlignment. So
On Fri, Mar 08, 2024 at 09:29:42AM -0600, Tom Lendacky wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
>
> The MpInitLib library will be updated to use the new AmdSvsmLib library.
> To prevent any build breakage, update the OvmfPkg DSCs file to include
> the AmdSvsmLib NULL librar
Hi,
> > (3) Cache the measured data somewhere if needed multiple times
> > (or simply cache unconditionally).
> >
> Yes, agree.
> Cache the measured data into HOB in the PEI phase
> and cache the measured data into the global variables in the DXE phase.
> How about this?
Load, measure
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