>
> +!if $(GENERIC_MEMORY_TEST_ENABLE) == TRUE
>
> +
> MdeModulePkg/Universal/MemoryTest/GenericMemoryTestDxe/Generic
> MemoryTestDxe.inf
>
> +!endif
>
> +!if $(NULL_MEMORY_TEST_ENABLE) == TRUE
>
>
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryT
> estDxe.inf
>
> +!endif
1.
Reviewed-by: Yuwei Chen
> -Original Message-
> From: Lin, Jason1
> Sent: Friday, July 1, 2022 11:10 PM
> To: devel@edk2.groups.io
> Cc: Lin, Jason1 ; Feng, Bob C ;
> Gao, Liming ; Chen, Christine
> ; Oram, Isaac W ;
> Chaganty, Rangasai V ; Chiang, Dakota
>
> Subject: [PATCH v3 3/3] [edk
Reviewed-by: Yuwei Chen
> -Original Message-
> From: Lin, Jason1
> Sent: Friday, July 1, 2022 11:10 PM
> To: devel@edk2.groups.io
> Cc: Lin, Jason1 ; Feng, Bob C ;
> Gao, Liming ; Chen, Christine
> ; Oram, Isaac W ;
> Chaganty, Rangasai V ; Chiang, Dakota
>
> Subject: [PATCH v3 2/3] [edk
Reviewed-by: Yuwei Chen
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Lin,
> Jason1
> Sent: Friday, July 1, 2022 11:10 PM
> To: devel@edk2.groups.io
> Cc: Lin, Jason1 ; Feng, Bob C ;
> Gao, Liming ; Chen, Christine
> ; Oram, Isaac W ;
> Chaganty, Rangasai V ; Chiang, Dako
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3923
According to definition of PcdTpm2HashMask, the mask reflects the PCR
banks which need to be extended.
In the Tcg2Pei SyncPcrAllocationsAndPcrMask function, we are setting
PcdTpm2HashMask to match the active PCR banks, but this will only occur
Thanks Ard, this was due to an actual failure that was a bit of a challenge to
debug.
A test in the ARM SBSA test suite installs the ISR first (which enables the
interrupt) and then calls in to UEFI
to change the interrupt type (EDGE vs LEVEL) as specified in the ACPI table.
The UEFI code call
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3923
According to definition of PcdTpm2HashMask, the mask reflects the PCR
banks which need to be extended.
In the Tcg2Pei SyncPcrAllocationsAndPcrMask function, we are setting
PcdTpm2HashMask to match the active PCR banks, but this will only occur
The issue appears to have been introduced by:
41fb5d46 : ArmPkg/ArmGic: Use the GIC Redistributor instead of GIC Distributor
for GICv3
The changes to ArmGicIsInterruptEnabled() introduced the error where the Boolean
result is assigned to Interrupts, but then the bit position check is performed
a
Hello,
I've encountered error during building Qualcomm deilivery with information to
write an email to you. Please, see logs in attachment.
Pozdrawiam/Kind Regards
Fryderyk Wiadzkowicz
Software Engineer
ADAS Application Interface Software
ZF Automotive Systems Poland Sp. z o.o.
Division U - El
Reviewed-by: Yuwei Chen
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Bob
> Feng
> Sent: Thursday, June 30, 2022 12:11 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D ; Kubacki, Michael
>
> Subject: [edk2-devel] [Patch V2] pip-requirements.txt: Update basetools
> v
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