I made a mistake for the execute time, the true execute time for resnet50 is 18
seconds and ssd_resnet50 is 23 seconds. sorry for this mistake. But I expect
millisecond execute time. could autotuning achieve this effect?
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I don't have any experience on this CPU model. But those performance numbers
are too bad anyhow, even assuming single thread. I don't have any clue for now.
Perhaps you want to share some code snippet.
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I had try use gluoncv got resnet50_v1 model, the execute time of model take 57
seconds.
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Can you try resnet-50 to see if the performance issue is in the base network or
not?
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Thank you so much for your suggestion,I had try set -mcpu for many arguments,
but it no reason so slow, even if there is no autotuning.
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Thank you so much for your suggestion, do you mean mcpu=silvermont, it works,
but also cost 98-seconds ...
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Try `mpcu=silvermont`. BTW, 101-second sounds shocking...
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Hi,
You might need to set extra llvm arguments, especially -mcpu option, depending
on your chip: https://llvm.org/docs/CommandGuide/llc.html
You can also try autotuning after proper llvm arguments are set.
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Thanks for the proposal. I think we can use more discussion here. To make
progress, it is good trying to divide the argument by points, so we can agree
on that.
For example, so instead of saying: register vm allows data flow discovery, but
dataflow discovery don't have to be done at the VM lev
In the long tradition of competitive engineering, let's develop both VMs
concurrently. That way we will generate actual engineering metrics of the
difference between a stack-based and a register-based VM. The engineering
dependencies are too complex to productively discuss without actually going
I proposed an alternative VM design using registers instead of stack. We can
discuss and compare which one works better.
cc @jroesch @tqchen @wweic @zhiics @MarisaKirisame @junrushao1994 @abergeron
@ajtulloch @antinucleon @Ravenwater
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# Register VM Design
Current Relay VM RFC (#2810) proposes stack-based VM design which uses push and
pop to maintain a unified stack. Though the design itself is simple to
implement, it is cumbersome in tasks such as dataflow analysis and enforces
certain orders in the execution.
I propose a re
system info:
cpu:J1900
mxnet==1.5.0
llvm==8.0
tvm==0.5.0
I just implement ssd model by tutorials, then I got a accurate result but it
cost 101 seconds with a 512*512 picture. I set target = llvm. ssd =
'ssd_512_resnet50_v1_voc'.
For the low efficiency,am I doing something wrong, or what I did
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