[ANNOUNCE] Apache NuttX 12.2.1 released

The Apache NuttX project team is proud to announce Apache NuttX 12.2.1 has been released. The release artifacts and Release Notes can be found at: https://nuttx.apache.org/download/ https://nuttx.apache.org/releases/12.2.1/ Thanks, Alin Jerpelea on behalf of Apache NuttX PPMC

RE: adding a new board - files?

Hi all, I added the support of nucleo-u5a5zj-q I made steps described in https://nuttx.apache.org/docs/latest/contributing/index.html There is a button on the branch page who says "Compare & pull request" Do I need to push it? or Do I need to do any additional steps? Sory for dumb questions but

Re: adding a new board - files?

Hi Krasimir: I wrote an article about submitting a NuttX Pull Request on GitHub, I hope this helps :-) https://lupyuen.codeberg.page/articles/pr.html Lup On Tue, Jul 18, 2023 at 6:44 PM Krasimir Cheshmedzhiev < cheshmedzh...@gmail.com> wrote: > Hi all, > > I added the support of nucleo-u5a5zj-q

Re: adding a new board - files?

On Tue, Jul 18, 2023 at 7:12 AM Lee, Lup Yuen wrote: > Hi Krasimir: I wrote an article about submitting a NuttX Pull Request on > GitHub, I hope this helps :-) > > https://lupyuen.codeberg.page/articles/pr.html > Hi Lup, That is a very helpful and detailed article -- thanks for writing it! Ch

50,000th commit!

Congrats to the NuttX community for reaching our 50,000th commit in the main repo! Cheers, Nathan

Re: [ANNOUNCE] Apache NuttX 12.2.1 released

CONGRATULATIONS! :-) -- CeDeROM, SQ7MHZ, http://www.tomek.cedro.info

Re: 50,000th commit!

:-) -- CeDeROM, SQ7MHZ, http://www.tomek.cedro.info

[Article] NuttX on Star64 JH7110: RISC-V Privilege Levels and UART Registers

We’re in the super-early stage of porting NuttX to the Pine64 Star64 64-bit RISC-V SBC. (Based on StarFive JH7110 SoC) In this article we’ll talk about the interesting things that we learnt about RISC-V and Star64 JH7110… (1) What are RISC-V Privilege Levels (And why they make NuttX a little

Re: [Article] NuttX on Star64 JH7110: RISC-V Privilege Levels and UART Registers

On Tue, Jul 18, 2023 at 7:33 PM Lee, Lup Yuen wrote: > We’re in the super-early stage of porting NuttX to the Pine64 Star64 64-bit > RISC-V SBC. (Based on StarFive JH7110 SoC) > > In this article we’ll talk about the interesting things that we learnt > about RISC-V and Star64 JH7110… > > (1) What

Re: [Article] NuttX on Star64 JH7110: RISC-V Privilege Levels and UART Registers

Thanks Nathan! I'm still getting used to NuttX Kernel Mode and RISC-V Machine / Supervisor Modes, so I thought I might stick with QEMU Kernel Mode and make it work on Star64. But you're right, when I'm more familiar with Star64, I ought to explore more of CONFIG_ARCH_USE_S_MODE and RISC-V Machine

Re: [Article] NuttX on Star64 JH7110: RISC-V Privilege Levels and UART Registers

On Tue, Jul 18, 2023 at 10:34 PM Lee, Lup Yuen wrote: > Thanks Nathan! I'm still getting used to NuttX Kernel Mode and RISC-V > Machine / Supervisor Modes, so I thought I might stick with QEMU Kernel > Mode and make it work on Star64. > > But you're right, when I'm more familiar with Star64, I ou