hi Rob,
I have a problem similar to yours,i have configured “QPSI” with interrupt
mode,but It's not working.
i can get the RDID and memory capacity via QSPI,but there is incorrect
data(0x88) read back after execute the chip erase command.
could hepe me?
Rob Voisey 于2020年5月5日周二 下午11:09写道：
> Actu
Maybe because you sent it as .patch, you need to rename it to .txt.
This is an old issue we still facing...
On 5/14/20, Joao Matos wrote:
> Sorry for the late reply.
>
> Dunno why the patches are not showing up, they show up as attached on my
> email client.
>
> Here goes in Gist format:
> https
Sorry for the late reply.
Dunno why the patches are not showing up, they show up as attached on my
email client.
Here goes in Gist format:
https://gist.github.com/tritao/406dc1460a9df6788ce2823d300be7a7
On Tue, May 5, 2020 at 4:09 PM Rob Voisey wrote:
> Actually it was my fault, I'm on a sligh
Actually it was my fault, I'm on a slightly old build and although I'd
diffed stm32_qspi.c against the head I'd missed an actual fix amongst all
the formatting corrections. I did a more thorough job this time and my
MX23L51245G driver now appears to read, write and erase correctly.
I'm still inter
Hi João,
Thanks, I'd love to get those patches if you could email or commit them.
Right now, using the MTD interface, I can read blocks of data but I can't
erase them because that uses a non-data command and those never set TCF for
reasons I've yet to understand.
Rob
On Tue, 5 May 2020 at 13:11
Other option is creating a PR: https://github.com/apache/incubator-nuttx/pulls
On 5/5/20, Alan Carvalho de Assis wrote:
> Hi João,
>
> How are you doing?
>
> I think you forgot to attach the patches.
>
> BR,
>
> Alan
>
> On 5/5/20, Joao Matos wrote:
>> Hello Rob,
>>
>> We have been using the STM
Hi João,
How are you doing?
I think you forgot to attach the patches.
BR,
Alan
On 5/5/20, Joao Matos wrote:
> Hello Rob,
>
> We have been using the STM32 F7 QSPI code, and found out the same issues.
>
> I've attached some patches with the fixes we have made, hope that helps.
>
>
>
> On Mon, M
Hello Rob,
We have been using the STM32 F7 QSPI code, and found out the same issues.
I've attached some patches with the fixes we have made, hope that helps.
On Mon, May 4, 2020 at 7:18 PM Rob Voisey wrote:
> Thanks Alan. I see it's almost an identical driver so I'll see if I can get
> hold
Thanks Alan. I see it's almost an identical driver so I'll see if I can get
hold of an L4 board.
Rob
On Mon, 4 May 2020 at 19:05, Alan Carvalho de Assis
wrote:
> Hi Rob,
>
> There are some QSPI usage examples for STM32L4 that is very similar
> and you can use as starting point.
>
> BR,
>
> Ala
Hi Rob,
There are some QSPI usage examples for STM32L4 that is very similar
and you can use as starting point.
BR,
Alan
On 5/4/20, Rob Voisey wrote:
> Hi
>
> I haven't been able to find any code that uses the STM32F7 QSPI code even
> though it has been in the codebase for a few years. An examp
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