Re: MTD data corruption issue when written with DMA from different threads

2023-06-23 Thread Oleg
Hi Petro, Thanks for the feedback! CONFIG_ARMV7M_DCACHE = y //only this option related to DCACHE CONFIG_STM32F7_DMACAPABLE = y CONFIG_STM32F7_SPI_DMATHRESHOLD = 8 no CONFIG_ARMV7M_DCACHE_WRITETHROUGH no CONFIG_SPI_TRIGGER no CONFIG_STM32F7_SPI1_DMA_BUFFER I've tried before with CONFIG_STM32F7_SP

Re: MTD data corruption issue when written with DMA from different threads

2023-06-22 Thread Petro Karashchenko
Hi, Could you please add some more information about the configuration like "CONFIG_STM32F7_DMACAPABLE", "CONFIG_SPI_TRIGGER", "CONFIG_STM32F7_SPIx_DMA_BUFFER" and "CONFIG_STM32F7_SPI_DMATHRESHOLD". Also the D-cache configuration like "CONFIG_ARMV7M_DCACHE_WRITETHROUGH". I do not see obvious issu