Re: SAMA5D3 and D4 DMA

2022-09-20 Thread NXWorld Lee
ompare to yours and hopefully spot any differences or errors, thank you! > > Regards, > > Tim. > > > On 19 Sep 2022, at 17:18, NXWorld Lee wrote: > > > > Hi Tim, > > SAMA5D2 has 2 XDMA controllers and the definition of peripherals channel > is > &g

Re: SAMA5D3 and D4 DMA

2022-09-19 Thread NXWorld Lee
Hi Tim, SAMA5D2 has 2 XDMA controllers and the definition of peripherals channel is also different with SAMA5D3 and SAMA5D4. I will raise a pull request of adding SAMA5D2 XDMA definition to NuttX. But I didn't test the XDMA driver on any SAMA5Dx platform. I run NuttX on SAMA5D3 and SAMA5D2, the ma

Re: Cache

2022-09-19 Thread NXWorld Lee
Hi Tim, Please find the following code in arch/arm/src/armv7-a/arm_head.S. The ICache and DCache will be enabled by default. #undef CPU_DCACHE_DISABLE #undef CPU_ICACHE_DISABLE #if !defined(CPU_DCACHE_DISABLE) && !defined(CONFIG_SMP) /* Dcache enable * * SCTLR_CBit 2: DCache enable */ orr