On Fri, Mar 25, 2022 at 6:53 PM Jukka Laitinen
wrote:
> Hi,
>
> I was trying to make a more general statement than starting discussion
> on separate PRs, but let me shortly answer still
>
> On 25.3.2022 10.32, Xiang Xiao wrote:
> > On Fri, Mar 25, 2022 at 3:35 PM Jukka Laitinen
> > wrote:
> >
>
On 3/25/22, Michael Jung wrote:
> Hi David,
>
> I think I figured it out: I am running in the non-secure world of
> TrustZone. Turns out ST missed configuring the IO Port I as non-secure in
> their STM32U5 port of TrustedFirmware-M (all other IO ports are configured
> as non-secure). I am compil
Hi David,
I think I figured it out: I am running in the non-secure world of
TrustZone. Turns out ST missed configuring the IO Port I as non-secure in
their STM32U5 port of TrustedFirmware-M (all other IO ports are configured
as non-secure). I am compiling right now.
Security sucks :-)
Thanks f
Hi team,
Recently I've been working with FTP server example and explored the code
for FTPD as well. I have a question related to account flags. In
"apps/examples/ftpd/ftpd_main.c" I see the line:
{ FTPD_ACCOUNTFLAG_SYSTEM, "root", "abc123", NULL },
and message:
(account->flags & FTPD_ACCO
Does the CPU busfault if write the GPIOI MODER? Do the values stick when
written?
-Original Message-
From: Michael Jung
Sent: Friday, March 25, 2022 9:36 AM
To: dev
Subject: Re: STM32U585: Can't enable peripheral clock for IO port I (GPIOIEN
in RCC_AHB2ENR1)
Hi David,
Thanks for your r
Hi David,
Thanks for your reply. Actually, I am trying to get the B-U585I-IOT02A's
NOR flash chip running, which is connected via OCTOSPI. I can issue a
single command (READID) to the NOR flash and I get a sane reply, but any
follow-on command will just return nonsense (more specifically, the R
Hi Michael,
Odd. Did you check the defines? How are you verifying it? Have you JTAG-ed
it, could it be bad SVD? Have you just printed the value to be set and the
result ?
David
-Original Message-
From: Michael Jung
Sent: Friday, March 25, 2022 9:07 AM
To: dev
Subject: STM32U585: Can't
Hello,
This is more about STM32 than it is about NuttX, but I know there are
experts here: STM32U585 does have 8 GPIOs on Port I. However, setting bit
8 (GPIOIEN) in RCC_AHB2ENR1 seems to be ignored (i.e. GPIOIEN remains at
0). For the other eight IO ports (GPIO[A-H]EN) it works just fine. Any
Hi,
I was trying to make a more general statement than starting discussion
on separate PRs, but let me shortly answer still
On 25.3.2022 10.32, Xiang Xiao wrote:
On Fri, Mar 25, 2022 at 3:35 PM Jukka Laitinen
wrote:
Hi,
As an another example, we would very much like to bring in
CONFIG_BU
Hi,
As I'm the person who usually generates a lot of "style related" comments I
want to reply as well.
Since GitHub does not have a "severity" option for the option it is not too
convenient to distinguish between "optional" with "must have" comments. So
usually I use the "Comment" button instead
On Fri, Mar 25, 2022 at 3:35 PM Jukka Laitinen
wrote:
> Hi,
>
>
> As an another example, we would very much like to bring in
> CONFIG_BUILD_KERNEL support for RISC-V for NuttX, as we have worked hard
> on this for some time, and have it working. Now, even when this work it
> is only additions, no
Hi,
Please don't take the following as a rant, but rather as a kind reminder
for people conducting code reviews for NuttX.
Please, respect the author. You don't need to re-write every line of the
patch in comments just because you feel that the variable name could be
different or something i
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