Re: NUCLEO-L496ZG - clock misconfig

2021-10-06 Thread Nathan Hartman
In the board's board.h there are some defines that affect how the sysclk is setup. If e.g. the PLL params are off you'll see an issue like this. It should also be possible to singlestep through the very first arch init steps and see if it's taking a wrong turn somewhere. On Wed, Oct 6, 2021 at 8:2

NUCLEO-L496ZG - clock misconfig

2021-10-06 Thread Nuno Barcellos
Hi! I'm new to nuttx and have been trying to get it working for the first time on a NUCLEO-L4A6ZG board. I couldn't get the nsh working at first but after measuring a gpio + sleep signal, I found out that the clock is running 20x slower than it should be (a sleep(1) takes 20 secs). Then, if I conf

Re: controll sleep pin of uart tranceiver via ioctl

2021-10-06 Thread Alan Carvalho de Assis
Hi Simon, I think the sleep pin should be used in a more generic way, for instance, you can use the NuttX Power Management subsystem to control the CAN sleep pin. BR, Alan On Wednesday, October 6, 2021, Simon Filgis wrote: > Dear all, > > I have two LIN transceivers on my board with a dedicat

controll sleep pin of uart tranceiver via ioctl

2021-10-06 Thread Simon Filgis
Dear all, I have two LIN transceivers on my board with a dedicated sleep pin. I want to use the sleep functionality in my app. I tried the following: 1. have sam_serial.c be aware of a *board_init() and a *board_disable(bool disable) for every uartX 2. call *bard_init() in setup 3. make *board_di