Re: Warnings in Renesas common files

2020-09-04 Thread Nathan Hartman
On Fri, Sep 4, 2020 at 9:40 AM Bhindhiya Raja wrote: > > Hello Nathan, > > Thank you for your response. We have submitted 2 separate PRs as recommended > by you to resolve warnings 6 (#1695) and 8 (#1702). > > About warnings 1 to 4, we understand that casting away the 'volatile' type > qualifier

Re: stm32 uart init bug?

2020-09-04 Thread Nathan Hartman
On Fri, Sep 4, 2020 at 11:30 AM David Sidrane wrote: > I was not suggesting the fix should be in the boot loader, I was just > commenting on what the right way to do a boot loader. > > I am sure the F4/F7 serial drivers deal with the PE bits. It has many test > cases in the RC lib of PX4, it the l

RE: stm32 uart init bug?

2020-09-04 Thread David Sidrane
I was not suggesting the fix should be in the boot loader, I was just commenting on what the right way to do a boot loader. I am sure the F4/F7 serial drivers deal with the PE bits. It has many test cases in the RC lib of PX4, it the low level stuff that most likely does not work correctly And sho

Re: stm32 uart init bug?

2020-09-04 Thread Nathan Hartman
On Fri, Sep 4, 2020 at 9:46 AM Gregory Nutt wrote: > > > Sometimes the best results (on small systems) are obtained if boot loader > > leaves the CPU as it found it out of reset. > > > > If you think in terms of an OOD life cycle: The "Destructor" for each > block > > reset the HW to the reset st

Re: supporting tickless and non-tickless using arch_timer/alarm/rtc

2020-09-04 Thread Matias N.
Ok. I will open a ticket for this since stm32_tim_lowerhalf has this (unnecessary) limitation. On Fri, Sep 4, 2020, at 06:43, Xiang Xiao wrote: > Yes, arch_timer change the interrupt interval without stopping the timer > first to reduce the timer drift as much as possible. So the > timer driver

Re: stm32 uart init bug?

2020-09-04 Thread Gregory Nutt
Sometimes the best results (on small systems) are obtained if boot loader leaves the CPU as it found it out of reset. If you think in terms of an OOD life cycle: The "Destructor" for each block reset the HW to the reset state. With this approach, the SoC out of reset, and executing at __start

Re: Warnings in Renesas common files

2020-09-04 Thread Bhindhiya Raja
Hello Nathan, Thank you for your response. We have submitted 2 separate PRs as recommended by you to resolve warnings 6 (#1695) and 8 (#1702). About warnings 1 to 4, we understand that casting away the 'volatile' type qualifier of a variable should be avoided if possible. Can we consider modif

RE: supporting tickless and non-tickless using arch_timer/alarm/rtc

2020-09-04 Thread Xiang Xiao
Yes, arch_timer change the interrupt interval without stopping the timer first to reduce the timer drift as much as possible. So the timer driver has to remove the restriction from the code. > -Original Message- > From: Matias N. > Sent: Friday, September 4, 2020 2:13 AM > To: dev@nuttx.

RE: stm32 uart init bug?

2020-09-04 Thread David Sidrane
Nathan, Sometimes the best results (on small systems) are obtained if boot loader leaves the CPU as it found it out of reset. If you think in terms of an OOD life cycle: The "Destructor" for each block reset the HW to the reset state. With this approach, the SoC out of reset, and executing at __