Re: DPDK support in libpcap

2025-03-01 Thread Stephen Hemminger
Last time I looked at that code it was really ugly, and messy. But more of importantly it was the wrong use case. Very few users will want to have a NIC dedicated to capture only. The whole thing should be rewritten so that tcpdump/ Wireshark can run as secondary process using existing pdump API.

RE: [PATCH v3 3/3] test/event: unit test to burst add Rx queues to adapter

2025-03-01 Thread Naga Harish K, S V
> -Original Message- > From: Shijith Thotton > Sent: Monday, February 24, 2025 2:12 PM > To: Naga Harish K, S V ; jer...@marvell.com > Cc: Shijith Thotton ; dev@dpdk.org; > pbhagavat...@marvell.com > Subject: [PATCH v3 3/3] test/event: unit test to burst add Rx queues to > adapter > >

[PATCH v2 1/2] config: allow AVX512 instructions to be used with MSVC

2025-03-01 Thread Andre Muezerie
Up to now MSVC has being used with the default mode, which uses SSE2 instructions for scalar floating-point and vector calculations. https://learn.microsoft.com/en-us/cpp/build/reference/arch-x64?view=msvc-170 This patch allows users to specify the CPU for which the generated code should be optimi

RE: [PATCH v3 1/3] eventdev/eth_rx: add API to burst add queues to Rx adapter

2025-03-01 Thread Naga Harish K, S V
> -Original Message- > From: Shijith Thotton > Sent: Monday, February 24, 2025 2:12 PM > To: Naga Harish K, S V ; jer...@marvell.com > Cc: Shijith Thotton ; dev@dpdk.org; > pbhagavat...@marvell.com; Pathak, Pravin ; > Hemant Agrawal ; Sachin Saxena > ; Mattias R_nnblom > ; Liang Ma ; >

Re: Segfault in rcu

2025-03-01 Thread Dmitry Kozlyuk
Hi Andre, > @@ -386,7 +386,7 @@ rte_rcu_qsbr_dq_reclaim(struct rte_rcu_qsbr_dq *dq, > unsigned int n, > > cnt = 0; > > -char data[dq->esize]; > +char *data = alloca(dq->esize); > /* Check reader threads quiescent state and reclaim resources */ > while (cnt < n && >

[PATCH] net/ice: fix flow engines order

2025-03-01 Thread Vladimir Medvedkin
Reorder flow engine evaluation for RTE flow rule installation. Currently, the driver evaluates rules with engines in the order they are executed in the hardware. However, in this situation, some wildcarded flows that are also supported by the ACL engine are installed as switch engine rules, which s