On Thu, Jul 11, 2024 at 7:46 PM Srujana Challa wrote:
> > > +963,8 @@ virtio_user_handle_ctrl_msg_split(struct virtio_user_dev *dev,
> > struct vring *vri
> > > (struct virtio_pmd_ctrl *)hdr, dlen,
> > > nb_dlen);
> > >
> > > /* Update status */
> > > -
On 7/12/2024 4:18 AM, Ye, MingjinX wrote:
-Original Message-
From: Burakov, Anatoly
Sent: Friday, July 12, 2024 12:10 AM
To: Ye, MingjinX ; dev@dpdk.org
Cc: sta...@dpdk.org
Subject: Re: [PATCH 3/3] net/vdev: fix insert vdev core dump
On 3/14/2024 10:36 AM, Mingjin Ye wrote:
Insertin
On Thu, Jul 11, 2024 at 6:57 PM Bruce Richardson
wrote:
>
> The hash table used for managing the filter rules in the ice driver was
> dimensioned to a hard-coded 16k, which is insufficient for holding all
> the filters supported by E830 HW.
>
> Rather than using a hard-coded value which may need u
Hello,
On Wed, Jul 10, 2024 at 1:49 PM Anatoly Burakov
wrote:
>
> When array length is not aligned on a power of 2, we need to mask out the
> unaligned bits from the mask whenever we reach the last mask. However, when
> both
> ignore mask (e.g. due to starting at unaligned bit) and last index ig
The generation is done with Sphinx, which DPDK already uses, with
slightly modified configuration of the sidebar present in an if block.
Dependencies are installed using Poetry from the dts directory:
poetry install --with docs
After installing, enter the Poetry shell:
poetry shell
And then ru
Address a few errors reported by Sphinx when generating documentation:
framework/params/__init__.py:docstring of framework.params.modify_str:3:
WARNING: Inline interpreted text or phrase reference start-string
without end-string.
framework/params/eal.py:docstring of framework.params.eal.Eal
Sphinx imports every Python module when generating documentation from
docstrings, meaning all DTS dependencies, including Python version,
must be satisfied.
By adding Sphinx to DTS dependencies we provide a convenient way to
generate the DTS API docs which satisfies all dependencies.
Signed-off-by
These sources could be generated with the sphinx-apidoc utility, but
that doesn't give us enough flexibility, such as sorting the order of
modules or changing the headers of the modules.
The sources included in this patch were in fact generated by said
utility, but modified to improve the look of
The Sphinx script argument parsing improvement gives us more
flexibility going forward, such as the ability to add non-positional
arguments.
Signed-off-by: Juraj Linkeš
Reviewed-by: Luca Vizzarro
Reviewed-by: Jeremy Spewock
Acked-by: Bruce Richardson
Tested-by: Luca Vizzarro
Tested-by: Nichol
The tool used to generate DTS API docs is Sphinx, which is already in
use in DPDK. The same configuration is used to preserve style with one
DTS-specific configuration (so that the DPDK docs are unchanged) that
modifies how the sidebar displays the content.
Sphinx generates the documentation from
On Thu, Jul 11, 2024 at 1:38 AM David Christensen wrote:
>
> IBM POWER systems support more than one type of memory management unit
> (MMU). The Power ISA 3.0 specification, which applies to P9 and later
> CPUs, defined a new Radix MMU which, among other things, allows an
> anonymous memory page
On Thu, Jul 11, 2024 at 1:53 PM David Marchand
wrote:
> On Sat, Jul 6, 2024 at 5:39 AM Ferruh Yigit wrote:
> > >>> Fix some bugs in txgbe/ngbe, and support new features in ngbe driver.
> > >>>
> > >>> Jiawen Wu (19):
> > >>> net/txgbe: fix to parse tunnel packets
> > >>> net/txgbe: fix flow f
On Fri, Jul 12, 2024 at 10:40:02AM +0200, David Marchand wrote:
> On Thu, Jul 11, 2024 at 6:57 PM Bruce Richardson
> wrote:
> >
> > The hash table used for managing the filter rules in the ice driver was
> > dimensioned to a hard-coded 16k, which is insufficient for holding all
> > the filters sup
add implementation for probe/init and remove/deinit of the PCI device
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/ntnic_ethdev.c | 109 +--
1 file changed, 104 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/nt
Adds VFIO functionality and the DMA it requires.
The VFIO context is initialized during ntnic ethdev startup.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_ethdev.c | 23 +++
drivers/net/ntnic/ntnic_vfio.c | 235
Add ntnic utilities.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 2 ++
drivers/net/ntnic/ntnic_ethdev.c | 2 ++
drivers/net/ntnic/ntutil/nt_util.c | 33 +++
drivers/net/ntnic/ntutil/nt_util.h | 43 ++
4 files changed
Adds ntnic specific implementation for logging.
NT NIC uses this logging abstraction layer
to ensure that FPGA module implementations function both
within and outside in DPDK environment
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build| 2 ++
drivers/net/ntnic/ntlog/ntlog.c
Adds many of the high level structures needed by the ntnic FPGA modules
and adapter control.
This is considered the first part of the skeleton of ntnic FPGA support
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntos_drv.h | 2 +
drivers/net/ntnic/meson.build |
Adds support for eth_dev configure, start, stop, close, and infos_get.
The internal structs of ntnic is also added and initialized.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntdrv_4ga.h | 17 ++
drivers/net/ntnic/include/ntos_drv.h| 32
drivers/net/ntnic/include/n
Add interfaces for initialize the adapter
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 148 ++
drivers/net/ntnic/include/nt4ga_adapter.h | 40 ++
drivers/net/ntnic/include/ntdrv_4ga.h | 2 +
drivers/net/ntnic/meson.build
Add initial ntnic ethdev skeleton and register PCI probe functions
Update documentation: Device description and feature list
Signed-off-by: Serhii Iliushyk
---
.mailmap | 1 +
MAINTAINERS| 7
doc/guides/nics/features/ntnic.ini
Enable FPGA initialization and adds ethdev fw_version_get.
Signed-off-by: Serhii Iliushyk
---
doc/guides/nics/features/ntnic.ini| 1 +
doc/guides/nics/ntnic.rst | 5 +
drivers/net/ntnic/adapter/nt4ga_adapter.c | 52 +++-
drivers/net/ntnic/meson.build
As the ntnic can support different speeds,
an abstraction layer for 100G speed is needed.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 12 -
.../link_mgmt/link_100g/nt4ga_link_100g.c | 49 +++
drivers/net/ntnic/meson.build
Add functionality to read and control the link-state of the ntnic.
Note that must functions are not implemented yet.
Adds the following eth_dev_ops:
- dev_set_link_up
- dev_set_link_down
- link_update
- mac_addr_add
- mac_addr_set
- set_mc_addr_list
- promiscuous_enable
Signed-off-by: Serhii Iliu
Adds reset (RST) module for FW 9563.
Also adds SDRAM Controller (SDC) module,
as it is part of the startup and reset sequence.
Signed-off-by: Serhii Iliushyk
---
.../include/ntnic_nthw_fpga_rst_nt200a0x.h| 81 +++
drivers/net/ntnic/meson.build | 3 +
.../net/ntnic/nthw/cor
New ntnic FPGA modules:
- Host Interface (HIF): Basic FPGA info such as prod ID and build time.
- Inter-Integrated Circuit Controller (IIC): Use the FPGA to access
the other integrated circuits on the ntnic.
- PCI Express Gen3 (PCIE3): The FPGA part of PCIe3 initialization,
speed te
As the ntnic can support different port speeds, it also needs to support
different NIMs (Network Interface Module). This commit add the generic NIM
support for ntnic, such that the specific modules,
such as QSFP28 can be added later.
The communication with NIMs is in the form of I2C, so support fo
Includes support for QSFP and QSFP+.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntnic_nim.h | 10 +
.../link_mgmt/link_100g/nt4ga_link_100g.c | 12 +-
drivers/net/ntnic/nim/i2c_nim.c | 310 +-
drivers/net/ntnic/nim/i2c_nim.h
Includes support for QSFP28
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntnic_nim.h| 21 ++
drivers/net/ntnic/link_mgmt/nt4ga_link.c | 25 +++
drivers/net/ntnic/nim/i2c_nim.c | 267 ++-
drivers/net/ntnic/nim/nim_defines.h | 1 +
4 files
Add ntnic support for NT200A0X NIC
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 6 +++
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_fpga.h | 7 +++
.../nthw/core/nt200a0x/nthw_fpga_nt200a0x.c | 54 +
Adds functionality to control the physical layer of the OSI model.
This takes the form of the module
MAC PCS (Media Access Control Physical Coding Sublayer).
The functionality is used by the 100G link functionality to establish link.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/n
For NIM reset sequence GPIO communication is used.
After this commit the NIMs supported by ntnic
is able to start up and be controlled fully by the adapter.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/nt4ga_link.h| 1 +
.../link_mgmt/link_100g/nt4ga_link_100g.c |
Because the ntnic hardware supports multiple different FPGAs with different
pipelines and port speeds,
the clock profile is not hardcoded into the product,
and need to be initialized from software.
The clock profile itself is an array of integers
that was generated by Silicon Labs ClockBuilder.
S
Minutes of Technical Board Meeting, 2024-June-26
Members Attending
-
-Aaron
-Bruce
-Hemant
-Honnappa
-Jerin
-Konstantin
-Maxime
-Morten
-Stephen
-Thomas
NOTE: The technical board meetings every second Wednesday at
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are pub
Hello,
On Wed, Jul 3, 2024 at 12:19 PM Jerin Jacob wrote:
>
> On Wed, Jul 3, 2024 at 3:43 PM Srujana Challa wrote:
> >
> > This patch modifies the code to convert descriptor buffer IOVA
> > addresses to virtual addresses during the processing of shadow
> > control queue when IOVA mode is PA. Thi
On Fri, Jul 12, 2024 at 4:29 AM Jiale, SongX wrote:
> > ASan included in clang 17 and later suffixes symbols.
> > $ nm build/drivers/libtmp_rte_net_null.a | grep this_pmd
> > r this_pmd_name3
> > n
> > this_pmd_name3.f2cd16678ab09dba8fd23405d8d11fce
> >
> > This b
On Thu, Jul 11, 2024 at 7:46 PM Srujana Challa wrote:
> > -virtio_user_iova2virt(rte_iova_t iova)
> > +virtio_user_iova2virt(struct virtio_user_dev *dev, rte_iova_t iova)
> >
> > > {
> > > - if (rte_eal_iova_mode() == RTE_IOVA_VA)
> > > - return (void *)(uintptr_t)iova;
> > >
The code to update link status is not safe in secondary process.
If called from secondary it will crash, example from dumpcap:
eth_em_link_update
Signed-off-by: Jun Wang
---
drivers/net/e1000/em_ethdev.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/e1000/em_ethdev.c b/d
> -Original Message-
> From: Robin Jarry
> Sent: Friday, July 5, 2024 8:23 PM
> To: dev@dpdk.org; Jerin Jacob ; Kiran Kumar
> Kokkilagadda ; Nithin Kumar Dabilpuram
> ; Zhirun Yan
> Subject: [EXTERNAL] [PATCH v6] graph: expose node context as pointers
>
> In some cases, the node conte
>From coverity's point of view, it is theoretically possible to have an
infinite wait on a wait condition because while we do check for timeout,
we do not check for whether the event we are waiting for has already
occurred by the time we get to the first cond_wait call (in this case,
it's state of
> On Thu, Jul 11, 2024 at 7:46 PM Srujana Challa wrote:
> > > -virtio_user_iova2virt(rte_iova_t iova)
> > > +virtio_user_iova2virt(struct virtio_user_dev *dev, rte_iova_t iova)
> > >
> > > > {
> > > > - if (rte_eal_iova_mode() == RTE_IOVA_VA)
> > > > - return (void *)(uintptr_
On Mon, Jul 8, 2024 at 9:14 PM Hernan Vargas wrote:
>
> To prevent incorrect readings, initialize FFT and MLDTS queues to 0.
All calls to bb drivers info_get are preceded with a:
memset(&dev_info, 0, sizeof(dev_info));
dev->dev_ops->info_get(dev, &dev_info);
So I don't really fol
This patch modifies the code to convert descriptor buffer IOVA
addresses to virtual addresses only when use_va flag is false.
This patch fixes segmentation fault with vhost-user backend.
Fixes: 67e9e504dae2 ("net/virtio_user: convert cq descriptor IOVA address to
Virtual address")
Reported-by:
On 7/12/2024 10:32 AM, David Marchand wrote:
> On Thu, Jul 11, 2024 at 1:53 PM David Marchand
> wrote:
>> On Sat, Jul 6, 2024 at 5:39 AM Ferruh Yigit wrote:
>> Fix some bugs in txgbe/ngbe, and support new features in ngbe driver.
>>
>> Jiawen Wu (19):
>> net/txgbe: fix to parse
https://bugs.dpdk.org/show_bug.cgi?id=1487
Bug ID: 1487
Summary: blockcipher_test_case_run() does not log test_msg
Product: DPDK
Version: 24.07
Hardware: All
OS: All
Status: UNCONFIRMED
Severity: normal
On Mon, Jul 8, 2024 at 6:52 PM Shani Peretz wrote:
>
> DPDK allows for two ways to specify PCI device numbers:
> a full version (":08:00.0") and a short version ("08:00.0").
> The problem arises when the application uses one format (e.g., full)
> when running testpmd, but then tries to use the
Hello Zhoumin,
It looks like Loongarch CI failed to apply this patch, but it worked
at the other labs and locally for Serhii when they were checked out to
next-net.
Maybe your CI did not choose next-net, the right branch? I remember
you saying your CI is based on a fork of the dpdk-ci repo. Perha
On Fri, Jul 12, 2024 at 2:36 PM Srujana Challa wrote:
>
> This patch modifies the code to convert descriptor buffer IOVA
> addresses to virtual addresses only when use_va flag is false.
>
> This patch fixes segmentation fault with vhost-user backend.
>
> Fixes: 67e9e504dae2 ("net/virtio_user: conv
Hi Joel,
> -Original Message-
> From: Joel Kavanagh
> Sent: Thursday, July 11, 2024 2:15 PM
> To: Thomas Monjalon ; Ji, Kai ; De
> Lara Guarch, Pablo ; Fan Zhang
> ; Ciara Power
> Cc: dev@dpdk.org; gak...@marvell.com; sta...@dpdk.org; Kavanagh, Joel
>
> Subject: [PATCH v1] crypto/aesni_
All generations of QAT use the same Gen1 raw datapath. Gen4 needs a
different WRITE function than other generations. Added separation for
configuration of the raw ctx for Gen4 from the Gen1 codepath.
Fixes: 85fec6fd9674 ("crypto/qat: unify raw data path functions")
Cc: kai...@intel.com
Cc: sta...@
On 7/12/2024 1:47 PM, Ferruh Yigit wrote:
> On 7/12/2024 10:32 AM, David Marchand wrote:
>> On Thu, Jul 11, 2024 at 1:53 PM David Marchand
>> wrote:
>>> On Sat, Jul 6, 2024 at 5:39 AM Ferruh Yigit wrote:
>>> Fix some bugs in txgbe/ngbe, and support new features in ngbe driver.
>>>
>>>
The RISC-V Zbc extension adds instructions for carry-less multiplication
we can use to implement CRC in hardware. This patch set contains two new
implementations:
- one in lib/hash/rte_crc_riscv64.h that uses a Barrett reduction to
implement the four rte_hash_crc_* functions
- one in lib/net/net
The RISC-V Zbc extension adds carry-less multiply instructions we can
use to implement more efficient CRC hashing algorithms.
The RISC-V C api defines architecture extension test macros
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/main/riscv-c-api.md#architecture-extension-test-macros
The
Using carryless multiply instructions from RISC-V's Zbc extension,
implement a Barrett reduction that calculates CRC-32C checksums.
Based on the approach described by Intel's whitepaper on "Fast CRC
Computation for Generic Polynomials Using PCLMULQDQ Instruction", which
is also described here
(htt
Using carryless multiply instructions (clmul) from RISC-V's Zbc
extension, implement CRC-32 and CRC-16 calculations on buffers.
Based on the approach described in Intel's whitepaper on "Fast CRC
Computation for Generic Polynomails Using PCLMULQDQ Instructions", we
perform repeated folds-by-1 whils
A new cross-compilation target that has extensions that DPDK uses and
QEMU supports. Initially, this is just the Zbc extension for hardware
crc support.
Signed-off-by: Daniel Gregory
---
config/riscv/meson.build| 3 ++-
config/riscv/riscv64_qemu_linux_gcc | 1
When the RISC-V Zbc (carryless multiplication) extension is present, an
implementation of CRC hashing using hardware instructions is available.
Use it rather than jhash.
Signed-off-by: Daniel Gregory
---
examples/l3fwd/l3fwd_em.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
When the RISC-V Zbc (carryless multiplication) extension is present, an
implementation of CRC hashing using hardware instructions is available.
Use it rather than jhash.
Signed-off-by: Daniel Gregory
---
lib/ip_frag/ip_frag_internal.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
When the RISC-V Zbc (carryless multiplication) extension is present, an
implementation of CRC hashing using hardware instructions is available.
Use it rather than jhash.
Signed-off-by: Daniel Gregory
---
examples/l3fwd-power/main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
When the RISC-V Zbc (carryless multiplication) extension is present, an
implementation of CRC hashing using hardware instructions is available.
Use it rather than jhash.
Signed-off-by: Daniel Gregory
---
lib/hash/rte_cuckoo_hash.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/hash/r
When the RISC-V Zbc (carryless multiplication) extension is present, an
implementation of CRC hashing using hardware instructions is available.
Use it rather than jhash.
Signed-off-by: Daniel Gregory
---
lib/member/rte_member.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Adds ntnic specific implementation for logging.
NT NIC uses this logging abstraction layer
to ensure that FPGA module implementations function both
within and outside in DPDK environment
Signed-off-by: Serhii Iliushyk
---
v6
* Logging header file was moved
* Default log type was set to NOTICE
---
Add initial ntnic ethdev skeleton and register PCI probe functions
Update documentation: Device description and feature list
Signed-off-by: Serhii Iliushyk
---
v6
* Remove unused includes
* Remove EOF markers
* Remove unnecesarry commpiller flags
* Update documentation INI and RST files
*
add implementation for probe/init and remove/deinit of the PCI device
Signed-off-by: Serhii Iliushyk
---
v6
* Add driver deinitialization
* Add API rte_eth_dev_probing_finish
* Add correct API for finishing probing the device
* Remove duplicated calling 'rte_eth_copy_pci_info()'
Add ntnic utilities.
Signed-off-by: Serhii Iliushyk
---
v6
* NT utils header file was moved
---
drivers/net/ntnic/meson.build | 2 ++
drivers/net/ntnic/ntnic_ethdev.c | 2 ++
drivers/net/ntnic/ntutil/nt_util.c | 33 +++
drivers/net/ntnic/ntutil/nt_util.h | 43 +++
Adds support for eth_dev configure, start, stop, close, and infos_get.
The internal structs of ntnic is also added and initialized.
Signed-off-by: Serhii Iliushyk
---
v6
* Replace if_index with n_intf_no
* Unnecessry resources free was fixed
* Fix typo
* Useless vars were removed
---
drivers/net
Adds many of the high level structures needed by the ntnic FPGA modules
and adapter control.
This is considered the first part of the skeleton of ntnic FPGA support
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntos_drv.h | 2 +
drivers/net/ntnic/meson.build |
Add interfaces for initialize the adapter
Signed-off-by: Serhii Iliushyk
---
v6
* Function for global var clearing was removed
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 148 ++
drivers/net/ntnic/include/nt4ga_adapter.h | 40 ++
drivers/net/ntnic/include/ntdrv_4ga.h
Adds VFIO functionality and the DMA it requires.
The VFIO context is initialized during ntnic ethdev startup.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_ethdev.c | 23 +++
drivers/net/ntnic/ntnic_vfio.c | 235
Enable FPGA initialization and adds ethdev fw_version_get.
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
v7
* Add FW update feature to documentation - INI and RST files
---
doc/guides/nics/features/ntnic.ini| 1 +
doc/guides/nics/ntnic.rst | 5 +
d
Add ntnic support for NT200A0X NIC
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 6 +++
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_fpga.h | 7 +++
.../nthw/core/nt200a0x/nthw_fpga_nt200a0x.c | 54 +
Adds reset (RST) module for FW 9563.
Also adds SDRAM Controller (SDC) module,
as it is part of the startup and reset sequence.
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
---
.../include/ntnic_nthw_fpga_rst_nt200a0x.h| 81 +++
drivers/net/ntnic/meson.build |
Add functionality to read and control the link-state of the ntnic.
Note that must functions are not implemented yet.
Adds the following eth_dev_ops:
- dev_set_link_up
- dev_set_link_down
- link_update
- mac_addr_add
- mac_addr_set
- set_mc_addr_list
- promiscuous_enable
Signed-off-by: Serhii Iliu
As the ntnic can support different speeds,
an abstraction layer for 100G speed is needed.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 12 -
.../link_mgmt/link_100g/nt4ga_link_100g.c | 49 +++
drivers/net/ntnic/meson.build
As the ntnic can support different port speeds, it also needs to support
different NIMs (Network Interface Module). This commit add the generic NIM
support for ntnic, such that the specific modules,
such as QSFP28 can be added later.
The communication with NIMs is in the form of I2C, so support fo
Because the ntnic hardware supports multiple different FPGAs with different
pipelines and port speeds,
the clock profile is not hardcoded into the product,
and need to be initialized from software.
The clock profile itself is an array of integers
that was generated by Silicon Labs ClockBuilder.
S
New ntnic FPGA modules:
- Host Interface (HIF): Basic FPGA info such as prod ID and build time.
- Inter-Integrated Circuit Controller (IIC): Use the FPGA to access
the other integrated circuits on the ntnic.
- PCI Express Gen3 (PCIE3): The FPGA part of PCIe3 initialization,
speed te
Includes support for QSFP and QSFP+.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntnic_nim.h | 10 +
.../link_mgmt/link_100g/nt4ga_link_100g.c | 12 +-
drivers/net/ntnic/nim/i2c_nim.c | 310 +-
drivers/net/ntnic/nim/i2c_nim.h
Includes support for QSFP28
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntnic_nim.h| 21 ++
drivers/net/ntnic/link_mgmt/nt4ga_link.c | 25 +++
drivers/net/ntnic/nim/i2c_nim.c | 267 ++-
drivers/net/ntnic/nim/nim_defines.h | 1 +
4 files
For NIM reset sequence GPIO communication is used.
After this commit the NIMs supported by ntnic
is able to start up and be controlled fully by the adapter.
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
---
drivers/net/ntnic/include/nt4ga_link.h| 1 +
.../link_mgmt/link_100
Adds functionality to control the physical layer of the OSI model.
This takes the form of the module
MAC PCS (Media Access Control Physical Coding Sublayer).
The functionality is used by the 100G link functionality to establish link.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/n
12/07/2024 14:47, Ferruh Yigit:
> On 7/12/2024 10:32 AM, David Marchand wrote:
> > On Thu, Jul 11, 2024 at 1:53 PM David Marchand
> > wrote:
> >> On Sat, Jul 6, 2024 at 5:39 AM Ferruh Yigit wrote:
> >> Fix some bugs in txgbe/ngbe, and support new features in ngbe driver.
> >>
> >> Jia
On Thu, Jul 4, 2024 at 10:24 AM Potnuri Bharat Teja wrote:
>
> Update maintainers for chelsio cxgbe drivers.
>
> Signed-off-by: Potnuri Bharat Teja
Applied, thanks Potnuri for taking over.
--
David Marchand
On Mon, Jul 1, 2024 at 11:35 AM Ruifeng Wang wrote:
> On 2024/6/29 12:11 AM, Jack Bond-Preston wrote:
> > Update maintainers for Bitops, Ticketlock, and ARMv8 Crypto.
> >
> > Signed-off-by: Jack Bond-Preston
> > Reviewed-by: Wathsala Vithanage
> Acked-by: Ruifeng Wang
I want to thank you both
On Thu, Jun 27, 2024 at 9:24 PM Long Li wrote:
>
> > Subject: [PATCH 1/1] maintainers: update for vmbus/mana/netvsc drivers
> >
> > Add myself as maintainer for vmbus, mana and netvsc.
> >
> > Signed-off-by: Wei Hu
> Reviewed-by: Long Li
Applied, thanks.
--
David Marchand
On Fri, Jul 12, 2024 at 5:47 PM Daniel Gregory
wrote:
>
> The RISC-V Zbc extension adds instructions for carry-less multiplication
> we can use to implement CRC in hardware. This patch set contains two new
> implementations:
>
> - one in lib/hash/rte_crc_riscv64.h that uses a Barrett reduction to
Hello,
On Thu, May 30, 2024 at 7:21 PM Daniel Gregory
wrote:
>
> Instructions from RISC-V's Zicbop extension can be used to implement the
> rte_prefetch* family of functions. On modern versions of GCC (13.1.0+)
> and Clang (17.0.1+), these are emitted by __builtin_prefetch() when the
> extension
Hello,
On Tue, Jul 2, 2024 at 9:40 AM Chaoyong He wrote:
>
> From: Zerun Fu
>
> In the previous logic the 'fd' was only saved in the primary process,
> but for some devices this value is also used in the secondary logic.
>
> For example, the call of 'rte_pci_find_ext_capability()' will fail in
>
12/07/2024 15:49, David Marchand:
> On Mon, Jul 8, 2024 at 6:52 PM Shani Peretz wrote:
> >
> > DPDK allows for two ways to specify PCI device numbers:
> > a full version (":08:00.0") and a short version ("08:00.0").
> > The problem arises when the application uses one format (e.g., full)
> > w
https://bugs.dpdk.org/show_bug.cgi?id=1466
David Marchand (david.march...@redhat.com) changed:
What|Removed |Added
Resolution|--- |FIXED
https://bugs.dpdk.org/show_bug.cgi?id=1441
David Marchand (david.march...@redhat.com) changed:
What|Removed |Added
Status|CONFIRMED |RESOLVED
Res
A new DPDK release candidate is ready for testing:
https://git.dpdk.org/dpdk/tag/?id=v24.07-rc2
There are 461 new patches in this snapshot.
Release notes:
https://doc.dpdk.org/guides/rel_notes/release_24_07.html
Highlights of 24.07-rc2:
- SVE support in the hash library
On 7/12/2024 4:47 PM, Serhii Iliushyk wrote:
> Add initial ntnic ethdev skeleton and register PCI probe functions
> Update documentation: Device description and feature list
>
> Signed-off-by: Serhii Iliushyk
> ---
> v6
> * Remove unused includes
> * Remove EOF markers
> * Remove unnecesarry comm
On 7/12/2024 4:47 PM, Serhii Iliushyk wrote:
> add implementation for probe/init and remove/deinit of the PCI device
>
> Signed-off-by: Serhii Iliushyk
<...>
>
> static int
> nthw_pci_dev_deinit(struct rte_eth_dev *eth_dev __rte_unused)
> {
> - return 0;
> + NT_LOG_DBGX(DEB
On 7/12/2024 4:47 PM, Serhii Iliushyk wrote:
> Adds support for eth_dev configure, start, stop, close, and infos_get.
> The internal structs of ntnic is also added and initialized.
>
> Signed-off-by: Serhii Iliushyk
> ---
> v6
> * Replace if_index with n_intf_no
> * Unnecessry resources free was
On 7/12/2024 4:47 PM, Serhii Iliushyk wrote:
> New ntnic FPGA modules:
> - Host Interface (HIF): Basic FPGA info such as prod ID and build time.
> - Inter-Integrated Circuit Controller (IIC): Use the FPGA to access
> the other integrated circuits on the ntnic.
> - PCI Express Gen3 (PCIE3): Th
On 7/12/2024 4:47 PM, Serhii Iliushyk wrote:
> Add initial ntnic ethdev skeleton and register PCI probe functions
> Update documentation: Device description and feature list
>
> Signed-off-by: Serhii Iliushyk
>
Hi Serhii,
I put some comments but main issue is build failure after each patch,
can
On Fri, Jul 12, 2024 11:31 PM, Ferruh Yigit wrote:
> On 7/12/2024 1:47 PM, Ferruh Yigit wrote:
> > On 7/12/2024 10:32 AM, David Marchand wrote:
> >> On Thu, Jul 11, 2024 at 1:53 PM David Marchand
> >> wrote:
> >>> On Sat, Jul 6, 2024 at 5:39 AM Ferruh Yigit wrote:
> >>> Fix some bugs in txgbe
Introduce sections into AMD Linux getting start guide for
1. MAX LCORE
2. CPU power
Signed-off-by: Vipin Varghese
---
---
doc/guides/linux_gsg/amd_platform.rst | 21 +
1 file changed, 21 insertions(+)
diff --git a/doc/guides/linux_gsg/amd_platform.rst
b/doc/guides/linux_gs
Hi Patrick,
Thanks for reminding me. The pw_maintainers_cli.py script indeed is
outdated in my fork.
I have updated this script, but still failed to apply this patch. I saw
all the other labs applied this patch based on commit of
'a6c3ec342ee105e322ffdb21e810cdfd38455c62', but I cannot find
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