Hi Wenjing,
> -Original Message-
> From: wenjing.q...@intel.com
> Sent: Friday, October 27, 2023 12:18 PM
>
> From: Wenjing Qiao
>
> "program" action should also be added in structure rte_flow_desc_action.
>
> Fixes: 8f1953f1914d ("ethdev: add flow API for P4-programmable devices")
>
Hi Jei,
> -Original Message-
> From: Jie Hai
> Sent: Friday, October 27, 2023 12:28 PM
>
> 1. overwrite the comments of fields of 'rte_eth_rss_conf'.
> 2. Add comments for RTE_ETH_HASH_FUNCTION_DEFAULT.
>
> Signed-off-by: Jie Hai
> ---
> lib/ethdev/rte_ethdev.h | 33 ++
Hi,
> -Original Message-
> From: Gregory Etelson
> Sent: Thursday, October 26, 2023 10:12 AM
> To: dev@dpdk.org
> Cc: Gregory Etelson ; Maayan Kashani
> ; Raslan Darawsheh
> Subject: [PATCH v7 00/10] net/mlx5: support indirect actions list
>
> Add MLX5 PMD support for indirect actions l
In order to avoid linking with Libs.private, libarchive
is not added to ext_deps during the meson setup stage.
Since libarchive is not added to ext_deps, cross-compilation
or native compilation with libarchive installed in non-standard
location fails with errors related to "cannot find -larchive"
In order to avoid linking with Libs.private, libarchive
is not added to ext_deps during the meson setup stage.
Since libarchive is not added to ext_deps, cross-compilation
or native compilation with libarchive installed in non-standard
location fails with errors related to "cannot find -larchive"
19/10/2023 17:31, Thomas Monjalon:
> Some drivers could use more the PCI lib facilities.
>
> Thomas Monjalon (2):
> drivers: use macro for PCI address format
> drivers: use function to compare PCI addresses
Applied
Support the raw_encap/decap combinations in the indirect action
list, and translates to 4 types of underlayer tunnel operations:
1. Layer 2 encapsulation like VxLAN.
2. Layer 2 decapsulation like VxLAN.
3. Layer 3 encapsulation like GRE.
4. Layer 3 decapsulation like GRE.
Each indirect action list
Support the raw_encap/decap combinations in the indirect action
list, and translates to 4 types of underlayer tunnel operations:
1. Layer 2 encapsulation like VxLAN.
2. Layer 2 decapsulation like VxLAN.
3. Layer 3 encapsulation like GRE.
4. Layer 3 decapsulation like GRE.
Each indirect action list
On Fri, Oct 27, 2023 at 12:12 AM Srikanth Yalavarthi
wrote:
>
> This patch series is an implementation of revised ml/cnxk driver
> to support models compiled with TVM compiler framework. TVM models
> use a hybrid mode for execution, with regions of the model executing
> on the ML accelerator and t
Hi
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:51 PM
> Subject: [PATCH v4 1/4] net/mlx5: add support for ptype match in hardware
> steering
>
> The packet type matching provides quick way of finding out
> L2/L3/L4 protocols in a given packet. Tha
Hi
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:51 PM
>
> Expand packet type matching with support of the
> Fragmented IP (Internet Protocol) packet type.
>
> Signed-off-by: Alexander Kozyrev
> ---
Acked-by: Ori Kam
Best,
Ori
Hi
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:51 PM
>
> From: Michael Baum
>
> Add limitations for ptype item support in "mlx5.rst" file.
>
> Signed-off-by: Michael Baum
> ---
Acked-by: Ori Kam
Best,
Ori
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:51 PM
> Document new RTE_FLOW_ITEM_TYPE_PTYPE in the release notes.
>
> Signed-off-by: Alexander Kozyrev
> ---
Acked-by: Ori Kam
Best,
Ori
Hi Alex,
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:41 PM
>
> The level field in the integrity item is not taken into account
> in the current implementation of hardware steering.
> Use this value instead of trying to find out the encapsulation
Hi Alex
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:39 PM
>
> From: Michael Baum
>
> This patch changes the integrity item behavior for HW steering.
>
> Old behavior: the "ipv4_csum_ok" checks only IPv4 checksum and "l3_ok"
> checks everything
Update scale factor in IO info of TVM models from metadata.
Fixes: 35c3e790b4a0 ("ml/cnxk: update internal info for TVM model")
Signed-off-by: Srikanth Yalavarthi
---
drivers/ml/cnxk/mvtvm_ml_model.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/ml/cnxk/mvtvm_ml_model.c b/driver
Hi Suanming,
> -Original Message-
> From: Suanming Mou
> Sent: Tuesday, October 17, 2023 3:44 AM
>
> In order to clone the traffic from FDB to NIC TIR, user can set
> port representor action as mirror clone destination. In that case
> cloned traffic will be moved to E-Switch manager root
Hi Jiawei,
> -Original Message-
> From: Jiawei Wang
> Sent: Wednesday, October 11, 2023 9:43 AM
>
> The port action and jump to flow table action are not supported
> in the mirror flows (RTE_FLOW_ACTION_TYPE_SAMPLE with sample ratio=1)
> in E-Switch domain (transfer attribute set) witho
Hi,
> -Original Message-
> From: Rongwei Liu
> Sent: Sunday, October 29, 2023 2:54 PM
> To: dev@dpdk.org; Matan Azrad ; Slava Ovsiienko
> ; Ori Kam ; Suanming Mou
> ; NBU-Contact-Thomas Monjalon (EXTERNAL)
>
> Subject: [PATCH v3] net/mlx5: add indirect encap decap support
>
> Support th
It has a compilation issue,
@Rongwei Liu please lets fix it I missed it before integration
> -Original Message-
> From: Raslan Darawsheh
> Sent: Sunday, October 29, 2023 4:33 PM
> To: Rongwei Liu ; dev@dpdk.org; Matan Azrad
> ; Slava Ovsiienko ; Ori Kam
> ; Suanming Mou ; NBU-
> Contact
Support the raw_encap/decap combinations in the indirect action
list, and translates to 4 types of underlayer tunnel operations:
1. Layer 2 encapsulation like VxLAN.
2. Layer 2 decapsulation like VxLAN.
3. Layer 3 encapsulation like GRE.
4. Layer 3 decapsulation like GRE.
Each indirect action list
> -Original Message-
> From: Gregory Etelson
> Sent: Sunday, September 24, 2023 12:41 PM
>
> If application defined several actions templates with non-shared
> reformat or modify headers actions AND used these templates to create
> a table, HWS could share reformat or modify headers res
> -Original Message-
> From: Xueming(Steven) Li
> Sent: Sunday, August 27, 2023 11:18 AM
>
> This patch supports the new RSS symmetric hash function:
> RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ_SORT
>
> The new hash function makes symmetric hash result by swapping
> the source and desti
> -Original Message-
> From: Michael Baum
> Sent: Tuesday, August 22, 2023 1:36 PM
> From: Erez Shitrit
>
> The HW adds a random number per each hash, this value can be used for
> statistic calculation over the packets, for example by setting one bit in
> the mask of that filed we will
> -Original Message-
> From: Michael Baum
> Sent: Tuesday, August 22, 2023 1:36 PM
> Add support for random item in HWS mode.
>
> Signed-off-by: Michael Baum
> ---
Acked-by: Ori Kam
Best,
Ori
> -Original Message-
> From: Itamar Gozlan
> Sent: Monday, September 18, 2023 3:07 PM
>
> A default miss table is a way to define what happens to traffic that does
> not match any rule in a specific table. In hws, this is done by connecting
> the source table to the target table using t
> -Original Message-
> From: Tomer Shmilovich
> Sent: Tuesday, September 26, 2023 6:59 PM
> Subject: [PATCH] net/mlx5: supporting group set miss actions API
>
> Add implementation for rte_flow_group_set_miss_actions() API.
>
> Signed-off-by: Tomer Shmilovich
> ---
> Depends-on: series
New mlx5dr_context member replaces mlx5dr_cmd_query_caps.
Capabilities structure is a member of mlx5dr_context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/hws
The new function call `flow_hw_get_reg_id_from_ctx()` maps input
DR5 context and register type to REG_C register.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_f
New function call `flow_hw_get_reg_id_from_ctx()` matches REG_C
register to input DR5 context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/ml
1. Add rte_eth_dev parameter to the `flow_hw_get_reg_id()`
2. Add mlx5_flow_hw_get_reg_id()
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 2 +-
drivers/net/mlx5/mlx5_flow.h| 13 +++--
drivers/net/mlx5/mlx5_flow_dv.c | 12 ++--
drive
Current implementation stored REG_C registers available for HWS tags
in PMD global array. As the result, PMD could not work properly with
different port types that allocate REG_C registers differently.
The patch stores registers available to a port in the port
shared context. Register values will
Merge `mtr_color_reg` and `mlx5_flow_hw_aso_tag`
into `aso_reg`
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 10 +-
drivers/net/mlx5/mlx5.h| 3 +--
drivers/net/mlx5/mlx5_flow.c | 16
drivers/net/mlx5/mlx5_f
Move HWS flow tags registers initialization to shared dev context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 35 ++-
drivers/net/mlx5/mlx5.c | 75
drivers/net/mlx5/mlx5.h | 6 +++
drive
From: Itamar Gozlan
Add a method to the HW steering API that allows querying
the hash result for a given matcher and a set of items. This
can be used to predict the location of the rule in the hash table.
Signed-off-by: Itamar Gozlan
---
drivers/common/mlx5/mlx5_prm.h | 8 +++-
driver
From: Ori Kam
This commit adds calculate hash function support for mlx5 PMD.
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 32
drivers/net/mlx5/mlx5_flow.h| 8
drivers/net/mlx5/mlx5_flow_hw.c | 31 ++-
3
From: Ori Kam
Due to mlx5dr internal logic calling the rule_create function
must have items structure.
This commit create such temp structure.
Fixes: fa16fead9a68 ("net/mlx5/hws: support rule update after its creation")
Cc: ere...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_f
From: Ori Kam
Add query for nic flow table support bit.
Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
Cc: bi...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/common/mlx5/mlx5_devx_cmd
From: Ori Kam
This commit adds the support for a additional registers that were added
to the HW.
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 16 +
drivers/common/mlx5/mlx5_devx_cmds.h | 2 +-
drivers/common/mlx5/mlx5_prm.h | 36 -
From: Ori Kam
This commit introduce validation for invalid tags
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index
If application defined several actions templates with non-shared
reformat or modify headers actions AND used these templates to create
a table, HWS could share reformat or modify headers resources,
instead of creating a resource for each action template.
The patch activates HWS code in a way that
From: Itamar Gozlan
Only allow rule updates for rules with their status value equal to
MLX5DR_RULE_STATUS_CREATED.
Otherwise, the rule may be in an unstable stage like deleting and
this will result in a faulty unexpected scenario.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by
From: Hamdan Igbaria
Support crypto action creation, this action allows encryption/decryption
of the packet according a specific security crypto protocol.
For now we support encryption/decryption according ipsec protocol.
ipsec encryption handles the encoding of the data.
ipsec decryption handles
From: Hamdan Igbaria
Support ASO IPsec action, this action will allow performing
some of ipsec full offload operations, for example replay
protection and sequence number incrementation.
In Tx flow this action used before encrypting the packet to
increase the sequence number.
In Rx flow this actio
From: Hamdan Igbaria
Support reformat trailer action, this action allows
to insert/remove specific crypto security protocol
trailer on the packet.
For now support IPsec crypto protocol trailer.
The trailer should be added before encrypting the
packet in Tx flow, and it can be removed after decryp
From: Hamdan Igbaria
Support ASO first hit action.
This action allows tracking if a rule gets hit by a packet.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h | 5 +
drivers/net/mlx5/hws/mlx5dr.h| 25 +
From: Hamdan Igbaria
Support insert header action, this will allow encap at
a specific anchor and offset selected by the user.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/net/mlx5/hws/mlx5dr.h | 36
drivers/net/mlx5/hws/mlx5dr_a
From: Hamdan Igbaria
Support remove header action, this action will allow the user
to execute dynamic decaps by choosing to decap by providing a
start anchor and number of words to remove, or providing a
start anchor and end anchor.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-
From: Alex Vesker
Current TIR action is allowed to be used only for NIC RX,
this will allow TIR action over FDB for RX traffic in case
of TX traffic packets will be dropped.
Signed-off-by: Alex Vesker
Reviewed-by: Erez Shitrit
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h |
From: Alex Vesker
Each steering entry (STE) has a bit called re-parse used for
re-parsing the packet in HW, re-parsing is needed after
reformat (e.g. push/pop/encapsulate/...) or when modifying the
packet headers requiring structure change (e.g. TCP to UDP).
Until now we re-parsed the packet in e
From: Alex Vesker
With dynamic re-parse we would always require re-parse but
this is not always necessary. Re-parse is only needed when
the packet structure is changed. This support will allow
dynamically deciding based on the action pattern if re-parse
is required or no.
Signed-off-by: Alex Ves
From: Rongwei Liu
When removing the IPv6 routing extension header from the
packets, the destination address should be updated to the
last one in the segment list.
Enlarge the hardware sample scope to cover the last segment.
Signed-off-by: Rongwei Liu
Acked-by: Ori Kam
Acked-by: Suanming Mou
From: Rongwei Liu
A valid rte_errno is desired when DR layer api returns error
and it can't over-write the value set by under-layer.
Fixes: df61fcd5f3ca ("net/mlx5/hws: support insert header action")
Cc: hamd...@nvidia.com
Signed-off-by: Rongwei Liu
Reviewed-by: Alex Vesker
Acked-by: Ori Kam
From: Rongwei Liu
Add two dr_actions to implement IPv6 routing extension push and
remove, the new actions are multiple actions combination instead
of new types.
Basically, there are two modify headers plus one reformat action.
Action order is the same as encap and decap actions.
Signed-off-by:
From: Rongwei Liu
The rte action will be translated to multiple dr_actions which need
different setters to program them.
In order to leverage the existing setter logic, there is a new callback
introduce which called fetch_opt with unique parameter.
For each setter, it may have different reparsi
From: Rongwei Liu
Reserve the push data buffer for each job and the maximum
length is set to 128 for now.
Only supports type IPPROTO_ROUTING when translating the rte
flow action.
Remove actions must be shared globally and only supports next layer
as TCP or UDP.
Signed-off-by: Rongwei Liu
Acke
From: Rongwei Liu
After pushing/popping srv6 into/from IPv6 packets, the checksum
needs to be correct.
In order to achieve this, there is a need to control each STE' reparse
behavior(CX7 and above). Add two more flags enumeration definitions to
allow external control of reparse property in stc.
Hi,
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:51 PM
> To: dev@dpdk.org
> Cc: Ori Kam ; Matan Azrad ; Michael
> Baum ; Alex Vesker ; Suanming
> Mou ; Slava Ovsiienko ;
> Erez Shitrit
> Subject: [PATCH v4 0/4] ptype matching support in mlx5
>
>
Fix value of RTE_FLOW_PORT_FLAG_SHARE_INDIRECT.
Fixes: f5b2846d89d7 ("ethdev: share indirect action between ports")
Cc: sta...@dpdk.org
Signed-off-by: Gregory Etelson
---
lib/ethdev/rte_flow.h | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/lib/ethdev/rte_flow.
Support increased number of REG_Cx registers.
Gregory Etelson (7):
net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data
net/mlx5: add flow_hw_get_reg_id_from_ctx()
net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call
net/mlx5: add rte_device parameter to locate HW
New mlx5dr_context member replaces mlx5dr_cmd_query_caps.
Capabilities structure is a member of mlx5dr_context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/hws
The new function call `flow_hw_get_reg_id_from_ctx()` maps input
DR5 context and register type to REG_C register.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_f
New function call `flow_hw_get_reg_id_from_ctx()` matches REG_C
register to input DR5 context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/ml
1. Add rte_eth_dev parameter to the `flow_hw_get_reg_id()`
2. Add mlx5_flow_hw_get_reg_id()
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 2 +-
drivers/net/mlx5/mlx5_flow.h| 13 +++--
drivers/net/mlx5/mlx5_flow_dv.c | 12 ++--
drive
Merge `mtr_color_reg` and `mlx5_flow_hw_aso_tag`
into `aso_reg`
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 10 +-
drivers/net/mlx5/mlx5.h| 3 +--
drivers/net/mlx5/mlx5_flow.c | 16
drivers/net/mlx5/mlx5_f
Current implementation stored REG_C registers available for HWS tags
in PMD global array. As the result, PMD could not work properly with
different port types that allocate REG_C registers differently.
The patch stores registers available to a port in the port
shared context. Register values will
Move HWS flow tags registers initialization to shared dev context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 35 ++-
drivers/net/mlx5/mlx5.c | 75
drivers/net/mlx5/mlx5.h | 6 +++
drive
From: Ori Kam
This commit adds calculate hash function support for mlx5 PMD.
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 32
drivers/net/mlx5/mlx5_flow.h| 8
drivers/net/mlx5/mlx5_flow_hw.c | 31 ++-
3
From: Itamar Gozlan
Add a method to the HW steering API that allows querying
the hash result for a given matcher and a set of items. This
can be used to predict the location of the rule in the hash table.
Signed-off-by: Itamar Gozlan
---
drivers/common/mlx5/mlx5_prm.h | 8 +++-
driver
From: Ori Kam
Due to mlx5dr internal logic calling the rule_create function
must have items structure.
This commit create such temp structure.
Fixes: fa16fead9a68 ("net/mlx5/hws: support rule update after its creation")
Cc: ere...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_f
From: Ori Kam
Add query for nic flow table support bit.
Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
Cc: bi...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/common/mlx5/mlx5_devx_cmd
From: Ori Kam
This commit introduce validation for invalid tags
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index
From: Ori Kam
This commit adds the support for a additional registers that were added
to the HW.
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 16 +
drivers/common/mlx5/mlx5_devx_cmds.h | 2 +-
drivers/common/mlx5/mlx5_prm.h | 36 -
> -Original Message-
> From: Radu Nicolau
> Sent: Thursday, October 26, 2023 5:34 PM
> To: Marchand, David ; dev@dpdk.org
> Cc: sta...@dpdk.org; Wu, Jingjing ; Xing, Beilei
> ; Doherty, Declan ;
> Sinha, Abhijit
> Subject: Re: [PATCH] net/iavf: fix indent in Tx path
>
>
> On 26-Oct-23
> -Original Message-
> From: David Marchand
> Sent: Thursday, October 26, 2023 4:08 PM
> To: Nicolau, Radu
> Cc: Wu, Jingjing ; Xing, Beilei
> ;
> dev@dpdk.org; sta...@dpdk.org
> Subject: Re: [PATCH v2] net/iavf: fix Tx offloading flags check
>
> On Wed, Oct 25, 2023 at 11:13 AM Radu
在 2023/10/29 23:48, Stephen Hemminger 写道:
On Sat, 28 Oct 2023 09:48:44 +0800
Huisong Li wrote:
The "min_rx_bufsize" in struct rte_eth_dev_info stands for the minimum
Rx buffer size supported by hardware. Actually, some engines also have
the maximum Rx buffer specification, like, hns3.
If mb
From: Wenjing Qiao
Parse JSON file and generate rules that instruct PMD to map an
RTE_FLOW_ACTION_TYPE_PROG to a low-level FXP representation, the
matching follows below guidelines.
Use rte_flow_action_prog->name to match the name of a P4 action
type when provided in the JSON file. In cases wher
The packets handled by port representor action will be steered to
E-Switch manager and received by software.
This commit adds port representor action.
Signed-off-by: Suanming Mou
Acked-by: Ori Kam
---
doc/guides/nics/mlx5.rst| 6
drivers/net/mlx5/mlx5.h | 2 ++
drivers/n
In order to clone the traffic from FDB to NIC TIR, user can set
port representor action as mirror clone destination. In that case
cloned traffic will be moved to E-Switch manager root table, and
goes to software TIR.
This series adds the port representor support to mirror action.
v2:
- add Acked
In order to clone the traffic from FDB to NIC TIR, user can set
port representor action as mirror clone destination. In that case
cloned traffic will be moved to E-Switch manager root table, and
goes to software TIR.
This commit adds the port representor support to mirror action.
Signed-off-by: S
This commit adds the missing port representor support as sample
destination.
Signed-off-by: Suanming Mou
Acked-by: Ori Kam
---
app/test-pmd/cmdline_flow.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 6c8571154e..0d521159e9 1
Since the representor port needs to access the resources of the
associated DCF when it is closed. Therefore, the correct close
port operation is to close all the representor ports first, and
then close the associated DCF port.
If the DCF port is closed before the representor port on pmd exit.
This
Hi Stephen,
Thanks for your review.
在 2023/10/29 23:43, Stephen Hemminger 写道:
On Sat, 28 Oct 2023 09:48:45 +0800
Huisong Li wrote:
+ "Ethdev port_id=%u, the data size application
used in each mbuf is just %u instead of the whole data room(%u)
The message shou
> -Original Message-
> From: Srikanth Yalavarthi
> Sent: Thursday, October 26, 2023 6:20 PM
> To: Srikanth Yalavarthi
> Cc: dev@dpdk.org; Shivah Shankar Shankar Narayan Rao
> ; Anup Prabhu ;
> Prince Takkar
> Subject: [PATCH v2 1/1] app/mldev: enable support for pre-quantized I/O
>
> Fr
> -Original Message-
> From: Gregory Etelson
> Sent: Sunday, October 29, 2023 7:54 PM
> To: dev@dpdk.org
>
> Fix value of RTE_FLOW_PORT_FLAG_SHARE_INDIRECT.
>
> Fixes: f5b2846d89d7 ("ethdev: share indirect action between ports")
> Cc: sta...@dpdk.org
> Signed-off-by: Gregory Etelson
>
> -Original Message-
> From: Gregory Etelson
> Sent: Sunday, October 29, 2023 8:23 PM
>
> From: Itamar Gozlan
>
> Add a method to the HW steering API that allows querying
> the hash result for a given matcher and a set of items. This
> can be used to predict the location of the rule i
By default mbuf port is not initialized and for Rx inject
mbuf port update is required before submitting packet.
Fixes: 69e1a909aa08 ("test/crypto: add Rx inject")
Signed-off-by: Rahul Bhansali
---
app/test/test_cryptodev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/app/test/test_crypt
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