From: Selwin Sebastian
Added support for fw_version_get API
Signed-off-by: Selwin Sebastian
---
doc/guides/nics/features/axgbe.ini | 1 +
drivers/net/axgbe/axgbe_ethdev.c | 1 +
drivers/net/axgbe/axgbe_rxtx.c | 28
drivers/net/axgbe/axgbe_rxtx.h | 3 ++
Due to many instances of creating CQ SQ and RQ on DevX, they move to common.
v1: Initial release.
v2: Bug fix (sending wrong umem id to HW).
v3: Rebase + Bug fix (sending wrong CQE size to HW).
Michael Baum (19):
common/mlx5: fix completion queue entry size configuration
net/mlx5: remove CQE
According to the current data-path implementation in the PMD the CQE
size must follow the cache-line size.
So, the configuration of the CQE size should be depended in
RTE_CACHE_LINE_SIZE.
Wrongly, part of the CQE creations didn't follow it exactly what caused
an incompatibility between HW and SW i
The data-path code doesn't take care on 'rxq_cqe_pad_en' and use padded
CQE for any case when the system cache-line size is 128B.
This makes the argument redundant.
Remove it.
Fixes: bc91e8db12cd ("net/mlx5: add 128B padding of Rx completion entry")
Cc: sta...@dpdk.org
Signed-off-by: Michael Ba
In ASO SQ creation, the PMD allocates umem buffer for SQ.
When umem buffer allocation is fails, the MR and CQ memory are not freed
what caused a memory leak.
Free it.
Fixes: f935ed4b645a ("net/mlx5: support flow hit action for aging")
Cc: sta...@dpdk.org
Signed-off-by: Michael Baum
Acked-by: M
The CQ object in DevX is created in several places and in several
different drivers.
In all places almost all the details are the same, and in particular the
allocations of the required resources.
Add a structure that contains all the resources, and provide creation
and release functions for it.
Using common function for DevX CQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/regex/mlx5/mlx5_regex.c | 6 ---
drivers/regex/mlx5/mlx5_regex.h | 9 +---
drivers/regex/mlx5/mlx5_regex_control.c | 91 ++--
drivers/regex/
Using common function for DevX CQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/vdpa/mlx5/mlx5_vdpa.h | 10 +
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 86 +++--
drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 2 +-
3 files changed, 28 inse
Using common function for CQ creation at rearm queue and clock queue.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.h | 9 +--
drivers/net/mlx5/mlx5_rxtx.c | 2 +-
drivers/net/mlx5/mlx5_txpp.c | 139 ++-
3 files chan
Use common function for ASO CQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.h | 8 +---
drivers/net/mlx5/mlx5_flow_age.c | 82 +---
2 files changed, 19 insertions(+), 71 deletions(-)
diff --git a/drivers/net
Using common function for Tx CQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.h | 6 +-
drivers/net/mlx5/mlx5_devx.c | 178 +++
2 files changed, 29 insertions(+), 155 deletions(-)
diff --git a/drivers/net/ml
Using common function for Rx CQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.c | 8 ---
drivers/net/mlx5/mlx5.h | 3 +-
drivers/net/mlx5/mlx5_devx.c | 142 +--
drivers/net/mlx5/mlx5_rxtx.h | 4 --
4
The SQ object in DevX is created in several places and in several
different drivers.
In all places almost all the details are the same, and in particular the
allocations of the required resources.
Add a structure that contains all the resources, and provide creation
and release functions for it.
The PRM calculates page size in 4K, so need to reduce the log_wq_pg_sz
attribute.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_devx_cmds.c | 53
1 file changed, 23 insertions(+), 30 deletions(-)
diff --git a/drivers/common/
Using common function for DevX SQ creation for rearm and clock queue.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.h | 8 +--
drivers/net/mlx5/mlx5_txpp.c | 147 +++
2 files changed, 36 insertions(+), 119 deletions(-)
Using common function for DevX SQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/regex/mlx5/mlx5_regex.h | 8 +-
drivers/regex/mlx5/mlx5_regex_control.c | 153 ++-
drivers/regex/mlx5/mlx5_regex_fastpath.c | 14 +--
3 files change
Using common function for Tx SQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.h | 8 +--
drivers/net/mlx5/mlx5_devx.c | 162 ++-
2 files changed, 40 insertions(+), 130 deletions(-)
diff --git a/drivers/net/m
Using common function for ASO SQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_common_devx.h | 1 +
drivers/net/mlx5/mlx5.h| 8 +--
drivers/net/mlx5/mlx5_flow_age.c | 94 ++
3 files changed, 30 in
The RQ object in DevX is used currently only in net driver, but it share
for future.
Add a structure that contains all the resources, and provide creation
and release functions for it.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_common_devx.c | 113 +
The mlx5_devx_dbr_page structure was used to allocate and release the
umem of the doorbells.
Since doorbell and buffer have used same umem, this structure is
useless.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_common.c | 122
Using common function for Rx RQ creation.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/mlx5.h | 4 +-
drivers/net/mlx5/mlx5_devx.c | 177 +--
drivers/net/mlx5/mlx5_rxtx.h | 4 -
3 files changed, 37 insertions(+), 148 del
On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
wrote:
>
> There is no point it detecting whether we can use MSIX
> every time the interrupt is enabled/disabled/masked.
>
> Let's do it once for all at PCI device init time.
>
> Signed-off-by: Maxime Coquelin
Is this a rework/fix of fe19d49cb525
This patch adds support of the mbuf fast free offload to the
transmit datapath. This offload allows to free the mbufs on
transmit completion in the most efficient way. It requires
the all mbufs were allocated from the same pool, have
the reference counter value as 1, and have no any externally
atta
The mlx5 PMD supports packet data inlining by pushing data
to the transmit descriptor. If packet is short enough and all
data are inline, the mbuf is not needed for data send anymore
and can be freed.
The mbuf free was performed in the most inner loop building
the transmit descriptors. This patch
This patch adds support of the mbuf fast free offload to the
transmit datapath. This offload allows to free the mbufs on
transmit completion in the most efficient way. It requires
the all mbufs were allocated from the same pool, have
the reference counter value as 1, and have no any extarnally
atta
On Tue, Jan 05, 2021 at 11:33:20AM -0800, David Christensen wrote:
> Hey Nithin,
>
> > > +static int
> > > +test_memory_vfio_dma_map(void)
> > > +{
> > > + uint64_t sz1, sz2, sz = 2 * rte_mem_page_size();
> > > + uint64_t unmap1, unmap2;
> > > + uint8_t *alloc_mem;
> > > + uint8_t *mem;
> > > + in
On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
wrote:
>
> This patch moves the PCI specific initialization from
> eth_virtio_dev_init() to eth_virtio_pci_init().
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
wrote:
> diff --git a/drivers/net/virtio/virtio_user_ethdev.c
> b/drivers/net/virtio/virtio_user_ethdev.c
> index 1f1f63a1a5..f4775ff141 100644
> --- a/drivers/net/virtio/virtio_user_ethdev.c
> +++ b/drivers/net/virtio/virtio_user_ethdev.c
> @@ -66
06/01/2021 10:06, David Marchand:
> On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
> wrote:
> > diff --git a/drivers/net/virtio/virtio_user_ethdev.c
> > b/drivers/net/virtio/virtio_user_ethdev.c
> > index 1f1f63a1a5..f4775ff141 100644
> > --- a/drivers/net/virtio/virtio_user_ethdev.c
> > +++ b/
On 1/6/21 10:06 AM, David Marchand wrote:
> On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
> wrote:
>> diff --git a/drivers/net/virtio/virtio_user_ethdev.c
>> b/drivers/net/virtio/virtio_user_ethdev.c
>> index 1f1f63a1a5..f4775ff141 100644
>> --- a/drivers/net/virtio/virtio_user_ethdev.c
>>
On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
wrote:
>
> Going further in making the Virtio ethdev layer bus agnostic,
> this patch adds a boolean in the Virtio PCI device metadata.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
On 1/6/21 10:11 AM, Thomas Monjalon wrote:
> 06/01/2021 10:06, David Marchand:
>> On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
>> wrote:
>>> diff --git a/drivers/net/virtio/virtio_user_ethdev.c
>>> b/drivers/net/virtio/virtio_user_ethdev.c
>>> index 1f1f63a1a5..f4775ff141 100644
>>> --- a/
> -Original Message-
> From: Shiri Kuzin
> Sent: Tuesday, January 5, 2021 19:54
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; NBU-Contact-Adrien Mazarguil
> ; Ori Kam ;
> ferruh.yi...@intel.com; NBU-Contact-Thomas Monjalon
> ; Raslan Darawsheh
> Subject: [PATCH v2 3/8] common/mlx5: check GEN
> -Original Message-
> From: Shiri Kuzin
> Sent: Tuesday, January 5, 2021 19:54
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; NBU-Contact-Adrien Mazarguil
> ; Ori Kam ;
> ferruh.yi...@intel.com; NBU-Contact-Thomas Monjalon
> ; Raslan Darawsheh
> Subject: [PATCH v2 4/8] common/mlx5: create GE
> -Original Message-
> From: Shiri Kuzin
> Sent: Tuesday, January 5, 2021 19:54
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; NBU-Contact-Adrien Mazarguil
> ; Ori Kam ;
> ferruh.yi...@intel.com; NBU-Contact-Thomas Monjalon
> ; Raslan Darawsheh
> Subject: [PATCH v2 5/8] net/mlx5: create GENEV
> -Original Message-
> From: Shiri Kuzin
> Sent: Tuesday, January 5, 2021 19:54
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; NBU-Contact-Adrien Mazarguil
> ; Ori Kam ;
> ferruh.yi...@intel.com; NBU-Contact-Thomas Monjalon
> ; Raslan Darawsheh
> Subject: [PATCH v2 6/8] net/mlx5: add GENEVE T
> -Original Message-
> From: Shiri Kuzin
> Sent: Tuesday, January 5, 2021 19:54
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; NBU-Contact-Adrien Mazarguil
> ; Ori Kam ;
> ferruh.yi...@intel.com; NBU-Contact-Thomas Monjalon
> ; Raslan Darawsheh
> Subject: [PATCH v2 7/8] net/mlx5: add GENEVE T
> -Original Message-
> From: Shiri Kuzin
> Sent: Tuesday, January 5, 2021 19:54
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; NBU-Contact-Adrien Mazarguil
> ; Ori Kam ;
> ferruh.yi...@intel.com; NBU-Contact-Thomas Monjalon
> ; Raslan Darawsheh
> Subject: [PATCH v2 8/8] doc: update GENEVE TLV
On 12/14/2020 6:53 PM, Lance Richardson wrote:
Limit number of representor packets transferred per poll
to requested burst size.
Hi Lance,
Can you please describe the impact of the change? Since it has a fixes line, it
seems it is fixing something but it is not clear what is fixed.
Fixes:
On Sun, Dec 20, 2020 at 10:14 PM Maxime Coquelin
wrote:
>
> This patch introduces a new callback for device closing,
> making virtio_dev_close() bus-agnostic.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
> diff --git a/drivers/net/virtio/virtio_ethdev.c
> b/drivers/net/virtio/virtio_ethdev.c
> index 00aa38e4ef..91a93b2b6e 100644
> --- a/drivers/net/virtio/virtio_ethdev.c
> +++ b/drivers/net/virtio/virtio_ethdev.c
> @@ -1315,17 +1315,16 @@ vi
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> Bus type awareness at the generic ethdev level is no
> more needed as previous patches have made it bus-agnostic.
>
> This patch removes it from struct virtio_hw.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
Davi
On Fri, Dec 11, 2020 at 6:07 PM Andrew Boyer wrote:
>
> Our Coverity scan pointed out that path[] is never initialized.
> The official DPDK Coverity has not reported this so there is
> no public CID for it.
>
> Fixes: c44d09811b40 ("eal: add shared indexed file-backed array")
> Cc: anatoly.bura...
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> This patch moves the fields from virtio_hw structure that
> are PCI-specific to virtio_pci_dev_struct.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> This patch improves the virtio_hw struct packing,
> going from 88 down to 80 bytes with a 6 bytes hole in
> the end of the first cacheline. Fields only used in the
> slow path are placed in the end, so that hot path only
> uses the first
A particular FW version is aware of some set of match fields.
Depending on FW configuration and match specification type, a
known field may not necessarily be allowed to have a non-zero
mask. FW communicates such restrictions via field capabilities
MCDI. Newer FW may be aware of more fields. For su
The helper exits once it encounters a field which hasn't its
capability status reported by the FW. Handle the corner case
when the two mask-value pairs match for the field, which, in
the absence of capability information, is sufficient to deem
the class unaffected by the field. Explain this in a co
A field ID passed to the API may point to a gap in the array
of field descriptors. Turn down such invocations as improper.
Fixes: 370ed675a952 ("common/sfc_efx/base: support setting PPORT in match spec")
Cc: sta...@dpdk.org
Reviewed-by: Andy Moreton
Reviewed-by: Andrew Rybchenko
Signed-off-by:
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
> diff --git a/drivers/net/virtio/virtio.h b/drivers/net/virtio/virtio.h
> new file mode 100644
> index 00..eb078bc227
> --- /dev/null
> +++ b/drivers/net/virtio/virtio.h
> @@ -0,0 +1,75 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
Some figures had a title inside the picture but not in RST file.
As a consequence, some versions of Sphinx are emitting a warning.
Warning, treated as error:
doc/guides/prog_guide/graph_lib.rst:64:
no number is assigned for figure: figure-anatomy-of-a-node
The titles are m
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> This patch moves Virtio PCI legacy IO handling to
> virtio_pci.c. Two functions are created so that
> virtio_pci_ethdev does not have to care about it.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
> -Original Message-
> From: Medvedkin, Vladimir
> Sent: Tuesday, January 5, 2021 11:44 PM
> To: Ruifeng Wang ; Jan Viktorin
> ; jer...@marvell.com; Bruce Richardson
>
> Cc: dev@dpdk.org; hemant.agra...@nxp.com; Honnappa Nagarahalli
> ; nd
> Subject: Re: [RFC PATCH] lpm: add sve support
This patch adds an input set refinement function to support outer
and inner TCP/UDP patterns without input set for flow director filter.
1. flow create 0 ingress pattern eth / ipv4 / udp / end
actions rss queues 0 1 2 3 end / end
2. flow create 0 ingress pattern eth / ipv6 / tcp / end
action
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, January 5, 2021 8:59 PM
To: Pradeep Kumar Nalla
Cc: Jerin Jacob Kollanukkaran ; Satananda Burla
; dev@dpdk.org
Subject: Re: [EXT] Re: [dpdk-dev] [PATCH 00/15] Octeon Tx/Tx2 Endpoint pmd
On 1/5/2021 2:43 PM, Pradeep Kumar Nalla wrot
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 23/40] net/virtio: make Vhost-user req send
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 24/40] net/virtio: add Virtio-user ops to s
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 25/40] net/virtio: add Virtio-user features
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 26/40] net/virtio: add Virtio-user protocol
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 27/40] net/virtio: add Virtio-user memory t
On Wed, Jan 6, 2021 at 5:06 PM Pradeep Kumar Nalla wrote:
>
>
>
> -Original Message-
> From: Ferruh Yigit
> Sent: Tuesday, January 5, 2021 8:59 PM
> To: Pradeep Kumar Nalla
> Cc: Jerin Jacob Kollanukkaran ; Satananda Burla
> ; dev@dpdk.org
> Subject: Re: [EXT] Re: [dpdk-dev] [PATCH 00/1
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 28/40] net/virtio: add Virtio-user vring se
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 28/40] net/virtio: add Virtio-user vring se
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 29/40] net/virtio: add Virtio-user vring fi
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 30/40] net/virtio: add Virtio-user vring ad
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Monday, December 21, 2020 5:14 AM
> To: dev@dpdk.org; Xia, Chenbo ; olivier.m...@6wind.com;
> amore...@redhat.com; david.march...@redhat.com
> Cc: Maxime Coquelin
> Subject: [PATCH 31/40] net/virtio: add Virtio-user status o
-Original Message-
From: Ferruh Yigit
Sent: Monday, January 4, 2021 7:54 PM
To: Somalapuram, Amaranath ; dev@dpdk.org
Subject: Re: [PATCH v4] net/axgbe: support sfp module EEPROM
[CAUTION: External Email]
On 12/22/2020 7:01 AM, asoma...@amd.com wrote:
> From: Amaranath Somalapuram
>
Loading ecore clients (PMD or linux kernel driver) having different ecore
versions concurrently, is problematic from device's init/config
perspective. This fix changes driver's default load parameter to have
ecore version validated by MFW. All ecore clients having matching ecore
version should be a
Hi Ashish,
On Tue, Dec 29, 2020 at 01:22:04PM -0700, Ashish Sadanandan wrote:
> Hi Stephen,
> Should I reference the commit that created rte_mbuf_dyn.h for the Fixes tag?
Yes, it should reference the patch that introduced the issue. In this case,
it should be:
Fixes: 4958ca3a443a ("mbuf: suppo
m->nb_seg must be reset on mbuf free whatever the value of m->next,
because it can happen that m->nb_seg is != 1. For instance in this
case:
m1 = rte_pktmbuf_alloc(mp);
rte_pktmbuf_append(m1, 500);
m2 = rte_pktmbuf_alloc(mp);
rte_pktmbuf_append(m2, 500);
rte_pktmbuf_chain(m1, m2);
m0 =
On Mon, Jan 04, 2021 at 05:46:20PM -0500, Andrew Boyer wrote:
>
> > On Jan 1, 2021, at 12:19 PM, Honnappa Nagarahalli
> > wrote:
> >>
> >> 30/12/2020 20:09, Andrew Boyer:
> >>>
> On Dec 23, 2020, at 6:47 AM, Juraj Linkeš
> >> wrote:
>
> The current way of specifying Arm config
While compiling with clang 11 the callers of the
__mlx5_bit_off macro warns on the cast of pointers to
unsigned long which is a smaller int type in Windows.
warning: cast to smaller integer type 'unsigned long'
from 'u8 (*)[16]' [-Wpointer-to-int-cast]
To resolve it the type is changed to size_t
On 1/6/2021 12:31 PM, Somalapuram, Amaranath wrote:
-Original Message-
From: Ferruh Yigit
Sent: Monday, January 4, 2021 7:54 PM
To: Somalapuram, Amaranath ; dev@dpdk.org
Subject: Re: [PATCH v4] net/axgbe: support sfp module EEPROM
[CAUTION: External Email]
On 12/22/2020 7:01 AM, asom
On Mon, Jan 04, 2021 at 10:00:49PM +0530, Kumar Amber wrote:
> Add support for secondary processes in ioat devices. The update
> allocates a memzone for a primary process or returns it in a
> secondary process.
>
> Signed-off-by: Kumar Amber
> ---
Thanks for the patch. Some comments below.
Also,
When testpmd enabled the verbosity for the received packets, if two packets
were received at the same time, for example, sampling packet and normal
packet, the dump output of these packets may be overlapping due to multiple
core handling the multiple queues simultaneously.
The patch uses one strin
On Wed, 6 Jan 2021 15:42:21 +0200, Tal Shnaiderman wrote:
> While compiling with clang 11 the callers of the
> __mlx5_bit_off macro warns on the cast of pointers to
> unsigned long which is a smaller int type in Windows.
>
> warning: cast to smaller integer type 'unsigned long'
> from 'u8 (*)[16]
On 1/6/2021 11:58 AM, Jerin Jacob wrote:
On Wed, Jan 6, 2021 at 5:06 PM Pradeep Kumar Nalla wrote:
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, January 5, 2021 8:59 PM
To: Pradeep Kumar Nalla
Cc: Jerin Jacob Kollanukkaran ; Satananda Burla
; dev@dpdk.org
Subject: Re: [EXT]
On Tue, 5 Jan 2021 19:06:34 +0200, Tal Shnaiderman wrote:
[...]
> diff --git a/lib/librte_eal/include/rte_thread.h
> b/lib/librte_eal/include/rte_thread.h
> new file mode 100644
> index 00..dbc4b3adf8
> --- /dev/null
> +++ b/lib/librte_eal/include/rte_thread.h
> @@ -0,0 +1,39 @@
> +/* SPD
On Tue, Jan 05, 2021 at 02:17:44PM -0800, David Christensen wrote:
> > > The current meson option 'machine' should only specify the ISA, which is
> > > not
> > > sufficient for Arm, where setting ISA implies other setting as well.
> > > Add a new meson option, 'platform', which differentiates the
On Wed, Jan 6, 2021 at 7:54 PM Ferruh Yigit wrote:
>
> On 1/6/2021 11:58 AM, Jerin Jacob wrote:
> > On Wed, Jan 6, 2021 at 5:06 PM Pradeep Kumar Nalla
> > wrote:
> >>
> >>
> >>
> >> -Original Message-
> >> From: Ferruh Yigit
> >> Sent: Tuesday, January 5, 2021 8:59 PM
> >> To: Pradeep K
On Tue, 5 Jan 2021 19:06:35 +0200, Tal Shnaiderman wrote:
> Add support for TLS functionality in EAL.
>
> The following functions are added:
> rte_thread_tls_key_create - function to create a TLS data key.
> rte_thread_tls_key_delete - function to delete a TLS data key.
> rte_thread_tls_value_set
> -Original Message-
> From: Devendra Singh Rawat
> Sent: Wednesday, January 6, 2021 6:50 PM
> To: dev@dpdk.org; Jerin Jacob Kollanukkaran ;
> ferruh.yi...@intel.com
> Cc: GR-Everest-DPDK-Dev ; Igor
> Russkikh ; Rasesh Mody ;
> Manish Chopra ; Devendra Singh Rawat
> ; sta...@dpdk.org
>
Hi,
We're testing Windows build with the latest meson/ninja version available in
the meson github [1]
meson: 0.56.0
ninja: 1.10.2
and getting the output below, any idea why? looks like a bug since /subsystem
should be recognized.
FAILED: examples/dpdk-helloworld.exe examples/dpdk-helloworld.p
On Wed, Jan 06, 2021 at 03:18:17PM +, Tal Shnaiderman wrote:
> Hi,
>
> We're testing Windows build with the latest meson/ninja version available in
> the meson github [1]
>
> meson: 0.56.0
> ninja: 1.10.2
>
> and getting the output below, any idea why? looks like a bug since /subsystem
> s
On Wed, Jan 6, 2021 at 4:18 PM Tal Shnaiderman wrote:
>
> Hi,
>
> We're testing Windows build with the latest meson/ninja version available in
> the meson github [1]
>
> meson: 0.56.0
> ninja: 1.10.2
>
> and getting the output below, any idea why? looks like a bug since /subsystem
> should be re
On 12/3/20 12:36 AM, Xueming Li wrote:
> To improve throughput and latency, this patch allows Rx polling timer
> delay to 0us.
>
> Signed-off-by: Xueming Li
> Acked-by: Matan Azrad
> ---
> doc/guides/vdpadevs/mlx5.rst | 3 +--
> drivers/vdpa/mlx5/mlx5_vdpa.c | 9 +++--
> 2 files changed
-Original Message-
From: Jerin Jacob
Sent: Wednesday, January 6, 2021 8:14 PM
To: Ferruh Yigit
Cc: Pradeep Kumar Nalla ; Jerin Jacob Kollanukkaran
; Satananda Burla ; dev@dpdk.org
Subject: Re: [dpdk-dev] [EXT] Re: [PATCH 00/15] Octeon Tx/Tx2 Endpoint pmd
On Wed, Jan 6, 2021 at 7:54 P
On 12/3/20 12:36 AM, Xueming Li wrote:
> To improve performance and latency, this patch set Rx polling mode
s/set/sets/
I'll fix while applying.
> default delay time to zero.
>
> Signed-off-by: Xueming Li
> Acked-by: Matan Azrad
> ---
> drivers/vdpa/mlx5/mlx5_vdpa.h | 2 +-
> driver
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> This patch moves the virtqueues defines from PCI header
> to the genreric one.
generic*
>
> Signed-off-by: Maxime Coquelin
> ---
> drivers/net/virtio/virtio.h| 18 ++
> drivers/net/virtio/virtio_et
> Subject: Re: [dpdk-dev] Windows build broken on latest meson/ninja release
>
> External email: Use caution opening links or attachments
>
>
> On Wed, Jan 06, 2021 at 03:18:17PM +, Tal Shnaiderman wrote:
> > Hi,
> >
> > We're testing Windows build with the latest meson/ninja version
> > ava
On Wed, 6 Jan 2021 16:13:37 +0200
Jiawei Wang wrote:
> +print_ether_addr(const char *what, const struct rte_ether_addr *eth_addr,
> + char print_buf[], int buf_size, int *cur_len)
Use size_t instead of int for sizes?
The length can never be negative?
On Wed, 6 Jan 2021 16:13:37 +0200
Jiawei Wang wrote:
> + int buf_size = MAX_STRING_LEN;
> + char print_buf[buf_size];
Don't use dynamic sized array if you don't have to.
Various static checkers can see look for out of bounds access to
fixed size array.
Hi Fiona, Ashish
I'm going to add new HW offload compress PMD for mlx5 devices in 21.02.
I have some questions on the API:
#define RTE_COMP_FF_NONCOMPRESSED_BLOCKS(1ULL << 11)
/**< Creation of non-compressed blocks using RTE_COMP_LEVEL_NONE is supported */
1. What does it mean no
> Subject: Re: [dpdk-dev] Windows build broken on latest meson/ninja release
>
> External email: Use caution opening links or attachments
>
>
> On Wed, Jan 6, 2021 at 4:18 PM Tal Shnaiderman
> wrote:
> >
> > Hi,
> >
> > We're testing Windows build with the latest meson/ninja version
> > availab
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
> diff --git a/drivers/net/virtio/virtio.h b/drivers/net/virtio/virtio.h
> index eeeb5dba4f..5169436c9f 100644
> --- a/drivers/net/virtio/virtio.h
> +++ b/drivers/net/virtio/virtio.h
> @@ -106,6 +106,50 @@
> #define VIRTIO_MAX_VIRTQUEUE_PAIR
> Subject: Re: [PATCH v7 2/2] eal: add generic thread-local-storage functions
>
> External email: Use caution opening links or attachments
>
>
> On Tue, 5 Jan 2021 19:06:35 +0200, Tal Shnaiderman wrote:
> > Add support for TLS functionality in EAL.
> >
> > The following functions are added:
> >
From: Matan Azrad
Sent: Wednesday, January 6, 2021 3:57 PM
To: Trahe, Fiona ; ashish.gu...@marvell.com
Cc: dev@dpdk.org; NBU-Contact-Thomas Monjalon
Subject: DPDK compress API - questions
Hi Fiona, Ashish
I'm going to add new HW offload compress PMD for mlx5 devices in 21.02.
I have some q
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> This patch aims at isolating MSIX notion into PCI
> layer.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
On Sun, Dec 20, 2020 at 10:15 PM Maxime Coquelin
wrote:
>
> This patch moves vring alignment define to the generic
> Virtio header.
>
> Signed-off-by: Maxime Coquelin
Reviewed-by: David Marchand
--
David Marchand
To prepare for more representor types, this patch adds compatible VF
representor devargs syntax:
vf#: new VF port representor/s, example: vf[0-3], vf2
For backwards compatibility, representor "#" is deemed as "vf#".
Signed-off-by: Xueming Li
---
doc/guides/prog_guide/poll_mode_drv.rst | 6 +++-
This patch updates kvargs parser to allow comma in list value:
k1=a[1,2]b[3-5]
Signed-off-by: Xueming Li
---
lib/librte_kvargs/rte_kvargs.c | 83 +++---
1 file changed, 57 insertions(+), 26 deletions(-)
diff --git a/lib/librte_kvargs/rte_kvargs.c b/lib/librte_kvarg
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