> -Original Message-
> From: Matan Azrad
> Sent: Wednesday, November 13, 2019 0:00
> To: dev@dpdk.org
> Cc: Slava Ovsiienko ; Dekel Peled
>
> Subject: [PATCH v2] net/mlx5: revert default rules amount optimization
>
> This reverts commit 304ffe576f239e5405228c0feec04b6138d525b7.
>
> It t
> -Original Message-
> From: Jerin Jacob
> Sent: Friday, November 8, 2019 8:24 PM
> To: Ferruh Yigit
> Cc: Vamsi Krishna Attunuru ; dev@dpdk.org;
> tho...@monjalon.net; Jerin Jacob Kollanukkaran ; Kiran
> Kumar Kokkilagadda ; olivier.m...@6wind.com;
> anatoly.bura...@intel.com; arybche..
Acked-by: Hemant Agrawal
HI Stephen,
Will you please enhance it to also provide number of files in each
category?
We also need to think about how to handle the scripts "*.sh", as many of these
are without SPDX.
- we can either leave them as it is.
Or , we can put the SPDX header without a copyright?
Regards,
This patch set adds PCIe AER disable and FPGA interrupt support for
ipn3ke. It also provides a small rework for port bonding between FPGA
line side port and I40e PF port.
What is the PCI Express AER(Advanced Error Reporting)?
Advanced Error Reporting capability is implemented with a PCI Express
ad
From: Tianfei zhang
Every defined bit in FME_ERROR0 is RW1C. Other reserved bits are always
0 when readout and it will plan to be RW1C if needed in future.
So it is safe just write the read back value to clear all the errors.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/ra
From: Tianfei zhang
The length of send buffer of SPI bus should be 4bytes align.
Signed-off-by: Tianfei Zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/opae_spi_transaction.c | 40 ---
1 file changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/
From: Andy Pei
In ipn3ke, each FPGA network side port bonding to an i40e pf,
each i40e pf link status should get data from FPGA network,
side port. This patch provide bonding relationship.
Signed-off-by: Rosen Xu
Signed-off-by: Andy Pei
---
drivers/net/i40e/base/i40e_type.h | 3 +++
From: Tianfei zhang
Add irq support for ifpga FME global error, port error and uint unit.
We implmented this feature by vfio interrupt mechanism.
To build this feature, CONFIG_RTE_EAL_VFIO should be enabled.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
config/common_base
From: Tianfei zhang
This patch exposes SEU error information to application then application
could compare this information (128bit) with its own SMH file to know
if this SEU is a fatal error or not.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/ifpga_defines
From: Tianfei zhang
In PAC N3000 card, this is a BMC chip which using MAX10 FPGA
to manage the board configuration, like sensors, flash controller,
QSFP, powers. And this is a SPI bus connected between A10 FPGA and
MAX10, we can access the MAX10 registers over this SPI bus.
In BMC, there are abo
From: Tianfei zhang
The sensor devices are connected in MAX10 FPGA. we used the
device tree to describe those sensor devices. Parse the device
tree to get the sensor devices and add them into a list.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/opae_intel_ma
Add SEU interrupt support for FPGA.
Signed-off-by: Tianfei zhang
Signed-off-by: Rosen Xu
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/ifpga_rawdev.c | 245 +++
1 file changed, 245 insertions(+)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/if
From: Tianfei zhang
Introducing sensor APIs to PMD driver for PAC N3000 card.
Those sensor APIs:
1. opae_mgr_for_each_sensor()
2. opae_mgr_get_sensor_by_name()
3. opae_mgr_get_sensor_by_id()
4. opae_mgr_get_sensor_value_by_name()
5. opae_mgr_get_sensor_value_by_id()
6. opae_mgr_get_sensor_value(
Add PCIe BDF devices tree scan for ipn3ke.
Signed-off-by: Rosen Xu
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/ifpga_rawdev.c | 551 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 16 ++
2 files changed, 562 insertions(+), 5 deletions(-)
diff --git a/drivers/raw/
The ipn3ke board FPGA and i40e BDF scan has added in ifpga_rawdev,
so it doesn't need to provide configuration for i40e port bonding.
Signed-off-by: Rosen Xu
Signed-off-by: Andy Pei
---
drivers/net/ipn3ke/Makefile | 1 +
drivers/net/ipn3ke/ipn3ke_ethdev.c| 292 ++
From: Tianfei zhang
Update the SEU registser definition.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/ifpga_defines.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpg
From: Tianfei zhang
We can change the PKVL FEC mode when the A10 NIOS FW
initialization. The end-user can use this feature the
change the FEC mode, the default mode is RS FEC mode.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/ifpga_fme.c | 42 +++
From: Tianfei zhang
Clean fme errors register when some fme errors occurred.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/ifpga_fme_error.c | 24 ++--
drivers/raw/ifpga/ifpga_rawdev.c | 22 ++
2 files changed,
From: Tianfei zhang
Add new API to get the board info.
opae_mgr_get_board_info()
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/ifpga_api.c | 11 +++
drivers/raw/ifpga/base/ifpga_defines.h | 55 ++
drivers/raw/ifpga/base
From: Tianfei zhang
Add secure max10 device support.
Signed-off-by: Tianfei zhang
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/base/ifpga_defines.h| 2 +
drivers/raw/ifpga/base/ifpga_fme.c| 26 --
drivers/raw/ifpga/base/opae_intel_max10.c | 137 +---
From: Andy Pei
if fpga image support lightweight feature, set afu uuid to all 0, ipn3ke
representor will not be probed.
Signed-off-by: Andy Pei
---
drivers/raw/ifpga/ifpga_rawdev.c | 44 +---
1 file changed, 32 insertions(+), 12 deletions(-)
diff --git a/dr
From: Tianfei zhang
In PAC N3000 card, there is one MAX10 chip in each card, and
all of the sensors are connected to MAX10 chip. To support multiple
cards in one server, we introducing a sensor device list under
intel_max10_device instead of a global list. On the other hand, we
using separate int
From: Tianfei zhang
Introducing new register and unregister API for ifpga interrupt.
1. register FME and AFU interrupt
ifpga_register_msix_irq()
2. unregister FME and AFU interrupt
ifpga_unregister_msix_irq()
On PAC N3000 card, there is one PCIe MSIX interrupt for FME managerment,
like th
Currently, the next address picked by PCI mapping infrastructure
may be page-unaligned due to BAR length being smaller than page size.
This leads to a situation where the requested map address is invalid,
resulting in mmap() call returning an arbitrary address,
which will later interfere with devic
On 11/13, Cui LunyuanX wrote:
>After ports reset, tx laser register will be reset. The link
>status for 82599eb got from link status register was not correct.
>Set tx laser disable after ports reset.
>
>Fixes: 0408f47ba4d6 ("net/ixgbe: fix busy polling while fiber link update")
>Cc: sta...@dpdk.org
On Mon, Nov 4, 2019 at 11:15 AM Burakov, Anatoly
wrote:
>
> On 04-Nov-19 6:32 AM, Wangyu (Turing Solution Development Dep) wrote:
> >
> > Resolve address conflicts on 64K pagesize without base_virtaddr, which
> > cause new address conflicts in eal_get_virtual_area().
> >
> > Signed-off-by: Beard-
Hello Li Han,
On Tue, Nov 5, 2019 at 3:14 PM David Marchand wrote:
> On Sat, Oct 26, 2019 at 6:07 PM David Marchand
> wrote:
> > I took Anatoly patches since his work on the subject preceded your patch.
> > Please, test the current master branch and see if you still have issues.
>
> Did you have
The problem has been solved after that fix, it's a good solution to this
problem :)
And many thanks to you and Anatoly.
-邮件原件-
发件人: David Marchand [mailto:david.march...@redhat.com]
发送时间: 2019年11月13日 15:34
收件人: Wangyu (Eric)
抄送: dev@dpdk.org; ferruh.yi...@intel.com; Linuxarm ; humin
On Wed, Nov 13, 2019 at 8:46 AM Wangyu (Eric) wrote:
>
>
> The problem has been solved after that fix, it's a good solution to this
> problem :)
Cool, marking this patch as rejected.
> And many thanks to you and Anatoly.
You are welcome.
--
David Marchand
To avoid memzone reserve failure and memory leak, following
resources management should be added.
- Check if the FDIR Memzone already exists before reserving.
- Free FDIR memzone when teardown and other failure scenarios.
Fixes: 84dc7a95a2d3 ("net/ice: enable flow director engine")
Signed-off-by:
The removal of FDIR profile should start from the next
of ICE_FLTR_PTYPE_NONF_NONE.
Fixes: 109e8e06249e ("net/ice: configure HW flow director rule")
Signed-off-by: Wang ShougangX
---
drivers/net/ice/ice_fdir_filter.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/dr
These patches include FDIR memory resource fixes related to ICE driver.
Patch 1: fix memzone reserve and release in FDIR
Patch 2: fix removal of FDIR profile
Patch 3: fix FDIR counter resource release
Patch 4: fix wild pointer
---
v5 changes:
Changed loop start index in ice_fdir_prof_alloc().
To avoid wild pointer, pointers should be set to NULL after free them.
Fixes: 1a2fc1799f09 ("net/ice: reject duplicated flow for flow director")
Fixes: 84dc7a95a2d3 ("net/ice: enable flow director engine")
Fixes: 0f880c3df192 ("net/ice: add flow director counter resource init/release")
Signed-off
All the counter resources should be cleaned up when teardown.
Fixes: 0f880c3df192 ("net/ice: add flow director counter resource init/release")
Signed-off-by: Wang ShougangX
Acked-by: Qi Zhang
---
drivers/net/ice/ice_fdir_filter.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/n
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