> Subject: Re: [dpdk-dev] [memnic PATCH 4/7] pmd: use compiler barrier
>
> 2014-09-11 07:48, Hiroshi Shimamoto:
> > x86 can keep store ordering with standard operations.
>
> Are we sure it's always the case (including old 32-bit CPU)?
> I would prefer to have a refe
2014-09-11 07:48, Hiroshi Shimamoto:
> x86 can keep store ordering with standard operations.
Are we sure it's always the case (including old 32-bit CPU)?
I would prefer to have a reference here. I know we already discussed
this kind of things but having a reference in commit log could help
for fut
From: Hiroshi Shimamoto
x86 can keep store ordering with standard operations.
Using memory barrier is much expensive in main packet processing loop.
Removing this improves xmit/recv packet performance.
We can see performance improvements with memnic-tester.
Using Xeon E5-2697 v2 @ 2.70GHz, 4 vC
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