>
> > > > >
> > > > > The current system can identify only the implementer and part
> > > > > number of the arm device we're targeting, which is enough to
> > > > > identify the target
> > > CPU.
> > > > > However, even the full MIDR information is not enough to
> > > > > identify the SoC we're t
> > > >
> > > > The current system can identify only the implementer and part number
> > > > of the arm device we're targeting, which is enough to identify the
> > > > target
> > CPU.
> > > > However, even the full MIDR information is not enough to identify
> > > > the SoC we're targeting.
> > >
> >
> > >
> > > The current system can identify only the implementer and part number
> > > of the arm device we're targeting, which is enough to identify the target
> CPU.
> > > However, even the full MIDR information is not enough to identify
> > > the SoC we're targeting.
> > >
> > > Expand the
> -Original Message-
> From: Honnappa Nagarahalli
> Sent: Thursday, September 24, 2020 6:19 AM
> To: Juraj Linkeš ; bruce.richard...@intel.com;
> Ruifeng Wang ; Phil Yang ;
> vcchu...@amazon.com; Dharmik Thakkar ;
> jerinjac...@gmail.com; hemant.agra...@nxp.com
> Cc: dev@dpdk.org; nd ; H
Thanks Juraj for the quick RFC. Few comments inline.
>
> The current system can identify only the implementer and part number of
> the arm device we're targeting, which is enough to identify the target CPU.
> However, even the full MIDR information is not enough to identify the SoC
> we're targ
The current system can identify only the implementer and part number
of the arm device we're targeting, which is enough to identify the
target CPU. However, even the full MIDR information is not enough to
identify the SoC we're targeting.
Expand the "machine" meson variable to allow specifying the
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