Hi,
On Sat, Nov 03, 2018 at 01:19:29AM +, Gavin Hu (Arm Technology China) wrote:
>
>
> > -Original Message-
> > From: Bruce Richardson
> > Sent: Friday, November 2, 2018 7:44 PM
> > To: Gavin Hu (Arm Technology China)
> > Cc: dev@dpdk.org; tho...@monjalon.net; step...@networkplumbe
> > > ---
> > > doc/guides/rel_notes/release_18_11.rst | 7 +++
> > > lib/librte_ring/rte_ring_c11_mem.h | 10 --
> > > 2 files changed, 11 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/doc/guides/rel_notes/release_18_11.rst
> > > b/doc/guides/rel_notes/release_18_11.rst
> -Original Message-
> From: Bruce Richardson
> Sent: Friday, November 2, 2018 7:44 PM
> To: Gavin Hu (Arm Technology China)
> Cc: dev@dpdk.org; tho...@monjalon.net; step...@networkplumber.org;
> olivier.m...@6wind.com; chao...@linux.vnet.ibm.com;
> konstantin.anan...@intel.com; jerin.
On Fri, Nov 02, 2018 at 07:21:28PM +0800, Gavin Hu wrote:
> In __rte_ring_move_prod_head, move the __atomic_load_n up and out of
> the do {} while loop as upon failure the old_head will be updated,
> another load is costly and not necessary.
>
> This helps a little on the latency,about 1~5%.
>
>
In __rte_ring_move_prod_head, move the __atomic_load_n up and out of
the do {} while loop as upon failure the old_head will be updated,
another load is costly and not necessary.
This helps a little on the latency,about 1~5%.
Test result with the patch(two cores):
SP/SC bulk enq/dequeue (size: 8
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