Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-23 Thread Shreyansh Jain
> -Original Message- > From: Thomas Monjalon [mailto:tho...@monjalon.net] > Sent: Friday, September 22, 2017 7:49 PM > To: Shreyansh Jain > Cc: dev@dpdk.org; ferruh.yi...@intel.com; Hemant Agrawal > > Subject: Re: [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD > > 22/09/2017 16

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-22 Thread Thomas Monjalon
22/09/2017 16:00, Shreyansh Jain: > From: Thomas Monjalon [mailto:tho...@monjalon.net] > > At the beginning of fslmc work, I had understood that every NXP SoC were > > connecting components with the same principle which we could call the > > "Freescale bus". > > Then you came with this bus named bu

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-22 Thread Shreyansh Jain
Hello Thomas, > -Original Message- > From: Thomas Monjalon [mailto:tho...@monjalon.net] > Sent: Friday, September 22, 2017 6:43 PM > To: Shreyansh Jain > Cc: dev@dpdk.org; ferruh.yi...@intel.com; Hemant Agrawal > > Subject: Re: [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD >

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-22 Thread Thomas Monjalon
22/09/2017 15:06, Shreyansh Jain: > On Friday 22 September 2017 03:40 AM, Thomas Monjalon wrote: > > 09/09/2017 13:20, Shreyansh Jain: > >> DPAA, or Datapath Acceleration Architecture [R2], is a set of hardware > >> components designed for high-speed network packet processing. This > >> architectur

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-22 Thread Shreyansh Jain
On Friday 22 September 2017 03:40 AM, Thomas Monjalon wrote: 09/09/2017 13:20, Shreyansh Jain: DPAA, or Datapath Acceleration Architecture [R2], is a set of hardware components designed for high-speed network packet processing. This architecture provides the infrastructure to support simplified

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-21 Thread Thomas Monjalon
22/09/2017 08:25, Shreyansh Jain: > > It is a very long series introducing 3 different subsystems. > > I think everybody was scared about reviewing it. > > Well, then Ferruh is quite a brave man - I got loads of comments from > him. :D He is :) > > Why you did not split it? > > All the compone

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-21 Thread Shreyansh Jain
Hi Thomas, Thanks for comments. I will reply soon to those on v3 as well. On Friday 22 September 2017 03:40 AM, Thomas Monjalon wrote: 09/09/2017 13:20, Shreyansh Jain: DPAA, or Datapath Acceleration Architecture [R2], is a set of hardware components designed for high-speed network packet proc

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-21 Thread Thomas Monjalon
09/09/2017 13:20, Shreyansh Jain: > DPAA, or Datapath Acceleration Architecture [R2], is a set of hardware > components designed for high-speed network packet processing. This > architecture provides the infrastructure to support simplified sharing of > networking interfaces and accelerators by mul

Re: [dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-21 Thread Thomas Monjalon
09/09/2017 13:20, Shreyansh Jain: > v4: > - Some checkpatch fixes which were reported by checkpatch@dpdk > - adding support for extended stats (patch 41) Sorry, I did some comments on v3 instead of v4. But I think they apply anyway.

[dpdk-dev] [PATCH v4 00/41] Introduce NXP DPAA Bus, Mempool and PMD

2017-09-09 Thread Shreyansh Jain
Change Log: v4: - Some checkpatch fixes which were reported by checkpatch@dpdk - adding support for extended stats (patch 41) v3: - Rebasing over 17.11-rc0 (85238f50) - Checkpatch fixes (There are still 2 errors which I think are false positives) - Implement rte_bus.find_devi