Hello Gaetan,
Are my answers ok?
If so, could you reply it?
Many thanks to you.
> -Original Message-
> From: Xu, Rosen
> Sent: Sunday, April 01, 2018 0:26
> To: gaetan.ri...@6wind.com
> Cc: dev@dpdk.org; Doherty, Declan ;
> Richardson, Bruce ; shreyansh.j...@nxp.com;
> Zhang, Tianfei ; Wu
> -Original Message-
> From: Gaëtan Rivet [mailto:gaetan.ri...@6wind.com]
> Sent: Wednesday, March 28, 2018 21:26
> To: Xu, Rosen
> Cc: dev@dpdk.org; Doherty, Declan ;
> Richardson, Bruce ; shreyansh.j...@nxp.com;
> Zhang, Tianfei ; Wu, Hao
> Subject: Re: [PATCH v3 1/6] Add Intel FPGA B
On Wed, Mar 28, 2018 at 05:29:51PM +0800, Rosen Xu wrote:
> Signed-off-by: Rosen Xu
> ---
> lib/librte_eal/common/eal_common_options.c | 8 +++-
> lib/librte_eal/common/eal_options.h| 2 ++
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/lib/librte_eal/common/eal_c
Signed-off-by: Rosen Xu
---
lib/librte_eal/common/eal_common_options.c | 8 +++-
lib/librte_eal/common/eal_options.h| 2 ++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_options.c
b/lib/librte_eal/common/eal_common_options.c
index 9f2f
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