Re: [dpdk-dev] [PATCH v3 1/2] virtio: one way barrier for split vring used idx

.@intel.com; Honnappa Nagarahalli > ; Gavin Hu ; nd > ; dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v3 1/2] virtio: one way barrier for split vring > used idx > > On 04/06, Joyce Kong wrote: > >In case VIRTIO_F_ORDER_PLATFORM(36) is not negotiated, then the > >frontend an

Re: [dpdk-dev] [PATCH v3 1/2] virtio: one way barrier for split vring used idx

On 04/06, Joyce Kong wrote: >In case VIRTIO_F_ORDER_PLATFORM(36) is not negotiated, then the frontend >and backend are assumed to be implemented in software, that is they can >run on identical CPUs in an SMP configuration. >Thus a weak form of memory barriers like rte_smp_r/wmb, other than >rte_cio

[dpdk-dev] [PATCH v3 1/2] virtio: one way barrier for split vring used idx

In case VIRTIO_F_ORDER_PLATFORM(36) is not negotiated, then the frontend and backend are assumed to be implemented in software, that is they can run on identical CPUs in an SMP configuration. Thus a weak form of memory barriers like rte_smp_r/wmb, other than rte_cio_r/wmb, is sufficient for this ca