On Wed, Sep 14, 2016 at 11:43:35AM +0100, Ferruh Yigit wrote:
> Hi Nelio,
>
> On 9/7/2016 8:02 AM, Nelio Laranjeiro wrote:
> > To improve performance the NIC expects for large packets to have a pointer
> > to a cache aligned address, old inline code could break this assumption
> > which hurts perf
Hi Nelio,
On 9/7/2016 8:02 AM, Nelio Laranjeiro wrote:
> To improve performance the NIC expects for large packets to have a pointer
> to a cache aligned address, old inline code could break this assumption
> which hurts performance.
>
> Fixes: 2a66cf378954 ("net/mlx5: support inline send")
>
> S
To improve performance the NIC expects for large packets to have a pointer
to a cache aligned address, old inline code could break this assumption
which hurts performance.
Fixes: 2a66cf378954 ("net/mlx5: support inline send")
Signed-off-by: Nelio Laranjeiro
Signed-off-by: Vasily Philipov
---
d
3 matches
Mail list logo