[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-26 Thread Olivier MATZ
Hi Konstantin, On 05/26/2014 03:57 PM, Ananyev, Konstantin wrote: > In most cases just a compiler barrier is enough, but there are few exceptions. > Always using fence instructions - means introduce unnecessary slowdown for > cases, when order is guaranteed. > No using fences in cases, when they

[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-26 Thread Ananyev, Konstantin
Hi Oliver, >> So with the following fragment of code: >> extern int *x; >> extern __128i a, *p; >> L0: >> _mm_stream_si128( p, a); >> rte_compiler_barrier(); >> L1: >> *x = 0; >> >> There is no guarantee that store at L0 will always be finished >> before store at L1. >This code fragment looks v

[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-23 Thread Olivier MATZ
Hi Konstantin, Thanks for these code examples and explanations. On 05/20/2014 06:35 PM, Ananyev, Konstantin wrote: > So with the following fragment of code: > extern int *x; > extern __128i a, *p; > L0: > _mm_stream_si128( p, a); > rte_compiler_barrier(); > L1: > *x = 0; > > There is n

[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-20 Thread Ananyev, Konstantin
, 2014 1:13 PM To: Ananyev, Konstantin; dev at dpdk.org Subject: Re: [dpdk-dev] [PATCH] atomic: clarify use of memory barriers Hi Konstantin, Thank you for your review and feedback. On 05/20/2014 12:05 PM, Ananyev, Konstantin wrote: >> Note that on x86 CPUs, memory barriers between different co

[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-20 Thread Olivier MATZ
Hi Konstantin, Thank you for your review and feedback. On 05/20/2014 12:05 PM, Ananyev, Konstantin wrote: >> Note that on x86 CPUs, memory barriers between different cores can be >> guaranteed by a simple compiler barrier. > > I don't think this is totally correct. > Yes, for Intel cpus in many

[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-20 Thread Olivier Matz
This commit introduce rte_smp_mb(), rte_smp_wmb() and rte_smp_rmb(), in order to differentiate memory barriers used between lcores, and memory barriers used between a lcore and a device. The patch does not provide any functional change, the goal is to have more explicit call, making the code more r

[dpdk-dev] [PATCH] atomic: clarify use of memory barriers

2014-05-20 Thread Ananyev, Konstantin
nal Message- From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Olivier Matz Sent: Tuesday, May 20, 2014 10:36 AM To: dev at dpdk.org Subject: [dpdk-dev] [PATCH] atomic: clarify use of memory barriers This commit introduce rte_smp_mb(), rte_smp_wmb() and rte_smp_rmb(), in order to different