[dpdk-dev] [PATCH 2/2] ixgbe:replace compiler memory barrier and rte_wmb with rte_dma_rmb and rte_dma_wmb.

--- drivers/net/ixgbe/ixgbe_rxtx.c | 30 +- drivers/net/ixgbe/ixgbe_rxtx_vec.c | 3 +++ 2 files changed, 12 insertions(+), 21 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 3ace8a8..3316488 100644 --- a/drivers/net/

[dpdk-dev] [PATCH 1/2] eal:Introduce rte_dma_wmb/rte_dma_rmb.

These macro can be used to replace current PMD's compiler memory barrier (volatile varible) and rte_wmb. In x86, they implement to compiler memory barrier. In power, they implement to processor memory barrier. --- .../common/include/arch/ppc_64/rte_atomic.h| 4 .../common/include/a

[dpdk-dev] [PATCH 1/2] eal:Introduce rte_dma_wmb/rte_dma_rmb.

These macro can be used to replace current PMD's compiler memory barrier (volatile varible) and rte_wmb. In x86, they implement to compiler memory barrier. In power, they implement to processor memory barrier. --- .../common/include/arch/ppc_64/rte_atomic.h| 4 .../common/include/a

[dpdk-dev] [PATCH] librte_eal:Using compiler memory barrier for IA processor's rte_wmb/rte_rmb.

The current implementation of rte_wmb/rte_rmb for x86 is using processor memory barrier. It's unnessary for IA processor, compiler memory barrier is enough. But if dpdk runing on a AMD processor, maybe we should use processor memory barrier. I add a macro to distinguish them, if we compile DPDK

[dpdk-dev] [PATCH] ixgbe:Add write memory barrier for recv pkts.

Like transmit packets, before update receive descriptor's tail pointer, rte_wmb() should be added after writing recv descriptor. Signed-off-by: Dong Wang --- lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 5 + 1 file changed, 5 insertions(+) diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librt