[PATCH 5/5] common/cnxk: enable PF VF mbox

* Setting up the mailbox communication between PF and VF for cn20k * Update PFVF mbox CSRs offset change introduced in cn20k * Memory to be allocated by PF driver for PF VF mbox should be aligned to next power of 2. Signed-off-by: Harman Kalra --- drivers/common/cnxk/hw/rvu.h | 18 ++- dr

[PATCH 4/5] common/cnxk: define PF VF bit encoding in pcifunc

In cn20k, PF and VF bit encoding format in a pcifunc has changed to accommodate more no of PFs. Hence defining the pf/vf encoding parameters for cn20k and cn9k/10k platforms. Signed-off-by: Harman Kalra --- drivers/common/cnxk/roc_dev.c | 1 + drivers/common/cnxk/roc_dev_priv.h | 31 ++

[PATCH 3/5] common/cnxk: add cn20ka mbox support

Adding mbox support for PF to AF communicaiton, accessing the mbox region setup by AF and alliased to PF's bar 2 region. Signed-off-by: Harman Kalra --- drivers/common/cnxk/hw/rvu.h| 17 +++ drivers/common/cnxk/roc_constants.h | 12 +- drivers/common/cnxk/roc_dev.c | 184

[PATCH 2/5] common/cnxk: add CN20ka A0 model

Adding support for CN20ka A0 pass Signed-off-by: Harman Kalra --- drivers/common/cnxk/roc_model.c | 9 +-- drivers/common/cnxk/roc_model.h | 48 ++--- 2 files changed, 52 insertions(+), 5 deletions(-) diff --git a/drivers/common/cnxk/roc_model.c b/drivers/common

[PATCH 1/5] common/cnxk: define platform configuration

Defining compile time platform configuration to discrimate among different SOCs. Signed-off-by: Harman Kalra --- drivers/common/cnxk/meson.build | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index e0e4600989..

[PATCH 0/5] Marvell cn20K SOC base code

This patchset introduces foundational support for Marvell's CN20K SoC. Based on this series cn20K enhancements to PMD's such as 'common/cnxk', 'net/cnxk', 'mempool/cnxk', 'event/cnxk' etc, will be added. Harman Kalra (5): common/cnxk: define platform configuration common/cnxk: add CN20ka A0 m

Re: [RFC 1/2] eal: add llc aware functions

-unsigned int rte_get_next_lcore(unsigned int i, int skip_main, int wrap) +#define LCORE_GET_LLC \ + "ls -d /sys/bus/cpu/devices/cpu%u/cache/index[0-9] | sort -r | grep -m1 index[0-9] | awk -F '[x]' '{print $2}' " This won't work for some SOCs. Thank you for your response. ple

Re: [RFC 0/2] introduce LLC aware functions

Thank you Antaloy for the response. Let me try to share my understanding. I recently looked into how Intel's Sub-NUMA Clustering would work within DPDK, and found that I actually didn't have to do anything, because the SNC "clusters" present themselves as NUMA nodes, which DPDK already support

Re: [RFC 0/2] introduce LLC aware functions

Thank you Mattias for the comments and question, please let me try to explain the same below We shouldn't have a separate CPU/cache hierarchy API instead? Based on the intention to bring in CPU lcores which share same L3 (for better cache hits and less noisy neighbor) current API focuses

Re: [RFC 1/2] eal: add llc aware functions

+ "ls -d /sys/bus/cpu/devices/cpu%u/cache/index[0-9] | sort -r | grep -m1 index[0-9] | awk -F '[x]' '{print $2}' " NAK Running shell commands from EAL is non-portable and likely to be flagged by security scanning tools. Do it in C please. Thank you Stephen, for pointing this ou