major| Milestone:
Component: coreboot | Keywords:
Dependencies: | Patch Status: there is no patch
+--
`Commit 1f7d3c5672ec90f8d71907b1a07c8a87fa461047
major| Milestone:
Component: coreboot |Resolution:
Keywords: | Dependencies:
Patch Status: there is no patch|
+-
Comment (by anonymous):
Replying to [ticke
major| Milestone:
Component: coreboot |Resolution:
Keywords: | Dependencies:
Patch Status: there is no patch|
+-
Comment (by oxygene):
Can you please test if
#162: Move SYSTEM_TYPE to Kconfig
--+
Reporter: oxygene| Owner: oxygene
Type: enhancement|Status: new
Priority: minor | Milestone:
Component: coreboot
:
Component: coreboot |Resolution:
Keywords: SATA SSD EPIA CN | Dependencies:
Patch Status: there is no patch |
--+-
Comment (by ryzhovsergey@…):
Is any news here ?
--
Ticket URL: <https://tracker.coreboot.org/t
issues
Component: coreboot |Resolution:
Keywords: | Dependencies:
Patch Status: there is no patch |
--+---
Comment (by oxygene):
One of our lint tests ("make lint") looks
#177: Not compiling coreBoot
--+---
Reporter: darkshvein@… | Owner: stepan@…
Type: defect |Status: closed
Priority: major | Milestone:
Component: coreboot
#179: Coreboot on GigaByte GA-8IEXP ver. 1.2
--+-
Reporter: BlackSheep0@… | Owner: stepan@…
Type: enhancement|Status: closed
Priority: minor | Milestone: Going
#169: ASUS P4PE-X/SE.
--+
Reporter: anonymous | Owner: stepan@…
Type: defect |Status: closed
Priority: major | Milestone:
Component: coreboot
#170: Need coreboot for ASUS P4PE_X/SE
---+-
Reporter: aav@… | Owner: stepan@…
Type: defect |Status: closed
Priority: major | Milestone
$(PROGRAM) *.o
}}}
--
Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/182>
coreboot <http://www.coreboot.org/>
--
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: minor| Milestone:
Component: coreboot | Keywords:
Dependencies: | Patch Status: there is no
| patch
| Keywords: Asus p2b & aty128 failure
Component: coreboot | Patch Status: there is no patch
Dependencies: |
+--
both Asus P2B mobo's (core)boot fine with several AGP and
#185: Vtech partial success
---+--
Reporter: jeroenkrabbendam@… | Owner: stepan@…
Type: enhancement |Status: new
Priority: trivial | Milestone:
Component: coreboot
: coreboot| Keywords: gpxe
Dependencies: | Patch Status: there is no patch
---+--
Although (or: just because) novice in the field, I encountered some
problems with netbooting with coreboot
:
Component: coreboot |Resolution:
Keywords: | Dependencies:
Patch Status: there is no patch |
--+-
Comment (by alex@…):
I had the same problem with a Supermicro H8DM8-2 and a ASUS M4A88T-V
EVO/USB3
Any hint
|
-+--
Flashrom should have a --version option too, similar to superiotool (based
on svn revision).
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/92>
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-+--
Changes (by uwe):
* status: new => closed
* patchstatus: there is no patch => patch has been committed
* resolution: => fixed
Comment:
Fixed in r3067.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/92#comment:1>
coreboot <http:
tch has been committed
* resolution: => fixed
--
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+---
Comment (by navaraf):
FreeLDR can now boot Windows NT4/2000/XP/2003 directly without using
Microsoft loader. It would probably make sense to make it work as a
coreboot payload.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/35#comment:6>
coreboot <http://www.cor
=> closed
* resolution: => fixed
Comment:
PLCC-based flashing was accidentally broken in r2972. This was fixed in
r3087.
SPI-based flashing is now also fixed since r3088, thanks to Florentin
Demetrescu.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/87#comment:6&
t URL: <http://tracker.linuxbios.org/trac/coreboot/ticket/69#comment:3>
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encies: | Patchstatus: patch
needs work
--+-
Comment (by [EMAIL PROTECTED]):
Signed-off-by: Jon Dufresne <[EMAIL PROTECTED]>
--
Ticket URL: <http://tracker.linuxbios.org/trac/cor
-
Ticket URL: <http://tracker.linuxbios.org/trac/coreboot/ticket/70#comment:3>
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| Milestone: Cosmetic fixes
Component: coreboot | Version: v2
Resolution: fixed| Keywords:
Dependencies: #22 | Patchstatus: patc
: Port GRUB2 to coreboot
Component: grub2| Version:
Resolution: fixed| Keywords:
Dependencies: | Patchstatus: patch needs review
extensibility.
--
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eds review |
--+-
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|
--+-
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+---
Changes (by stepan):
* owner: somebody => stuge
* patchstatus: patch needs review => patch is ready to be committed
Comment:
Acked-by: Stefan Reinauer <[EMAIL PROTECTED]>
--
Ticket URL: <http://tracker.coreboot.org/trac/cor
|
-+--
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#102: flashrom: coreboot ROM image file identification heuristic is broken
---+
Reporter: stuge| Owner: somebody
Type: defect | Status: new
icket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/103>
coreboot <http://www.coreboot.org/>
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L: <http://tracker.coreboot.org/trac/coreboot/ticket/101#comment:1>
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|
-+--
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require -f to actually perform the test, since it will potentially
fail to restore the flash chip to it's original state.
--
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+---
Comment(by stuge):
Can also include adding wiki-usable output.
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+---
Changes (by stuge):
* status: new => closed
* patchstatus: patch is ready to be committed => patch has been
committed
* resolution: => fixed
Comment:
r3407
--
Ticket URL: <http://tracker.linuxbios.org/trac/coreboot/ticket/97#comment:2>
-+--
Changes (by stuge):
* owner: somebody => stuge
* patchstatus: patch needs review => patch needs work
Comment:
Fair enough, will work on patch.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/101#comment:2>
co
rac/coreboot/ticket/108>
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e.g. "Calling this our release 1.0" should be enough.
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#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: new
Priority
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: new
Priority
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: closed
t something into the Makefile to create a
Changelog file out of 'svn log', I'm just saying it's not absolutely
required for the debian package.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/105#comment:2>
coreboot <http://www.coreboot.org/>
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: reopened
Priority: major
s (by stuge):
* owner: somebody => stuge
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/103#comment:1>
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s (by stuge):
* status: new => assigned
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--+-
Changes (by hailfinger):
* patchstatus: patch needs review => patch needs work
Comment:
The patch is not really a readability improvement. Sorry.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/99#comment:1>
Comment(by hailfinger):
Can you match on the probing function instead? That would introduce less
regressions.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/98#comment:1>
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+---
Comment(by hailfinger):
If you can make sure nobody erases his chip by accident with this patch,
why not? That would reauire additional command line argument verification,
though.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/tic
-+--
Comment(by hailfinger):
This needs a big fat warning issued to the user if he attempts to write to
a non-erased area. Maybe even an abort.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/104#comment:1>
coreboot <http://www.coreboot.org/>
--
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+---
Comment(by hailfinger):
Good idea.
--
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+---
Comment(by hailfinger):
Good idea. I'd consider this to be optional, though.
--
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hanges the "automatic" behavior per default in
advance.
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-+--
Comment(by hailfinger):
The problem is that SPI chips do not erase by default, so we have
inconsistent behaviour. We need to agree on one behaviour and "fix" the
non-conforming drivers.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/104#comment:3>
coreboot <http
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: reopened
Priority: major
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: reopened
Priority: major
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: reopened
Priority: major
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: reopened
Priority: major
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: somebody
Type: defect|Status: reopened
Priority: major
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: stuge
Type: defect|Status: new
Priority: major
#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: stuge
Type: defect|Status: new
Priority: major
stuge):
* patchstatus: there is no patch => patch needs review
--
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iting?
The best solution would be making -r and -E mutually exclusive like -r
-and -w are.
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+---
Comment(by hailfinger):
For -T to work, you have to remove the mutual exclusion between -r and -w
in a meaningful way. This may require a rewrite of the main loop.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/106#comment:2>
coreboot <http://www.cor
drops the nasty
ifdefs and implements auto detection for AMD SC520 systems, such as the
Technologic Systems TS5300.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/109>
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):
* version: v2 =>
* component: adlo => flashrom
* milestone: => flashrom v1.0
--
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-+--
Changes (by stepan):
* milestone: flashrom v1.0 => flashrom 1.1
Comment:
Moving this to 1.1
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/101#comment:3>
coreboot <http://www.coreboot.org/>
--
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+---
Comment(by stepan):
Is this only about changelog, or anything else? (topic says "ChangeLog
etc")
--
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+---
Changes (by stepan):
* milestone: flashrom v1.0 => flashrom 1.1
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e try to set to 1 are
0.
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true and another variable elan_baseaddr. That way, we can keep the
main flashrom loop mostly free of chipset/processor dependent stuff. I'm
open to variants of the above, though, as long as code is moved to
chipset_enable.c.
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/tick
is very readable and upon moving it to chipset_enable.c, it
is
Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
--
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#102: flashrom: coreboot ROM image file identification heuristic is broken
-+--
Reporter: stuge | Owner: stuge
Type: defect|Status: new
Priority: major
:
Component: coreboot |Version: v3
Keywords: | Dependencies:
Patchstatus: there is no patch |
-+--
Currently both v2 and v3 only allow us to use one global set
#35: Make it possible to boot Windows using coreboot
+---
Reporter: uwe | Owner:
Type: enhancement |Status: new
Priority: critical
<http://tracker.coreboot.org/trac/coreboot/ticket/111>
coreboot <http://www.coreboot.org/>
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segher in #coreboot.
In probe_flash(), flash_baseaddr is set before the getpagesize() > size
check, thus can be invalid, causing mmap issues.
--
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|Version: v2
Keywords: | Dependencies:
Patchstatus: there is no patch |
-+--
there is a bug
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/
g `make install`?
{{{
# ./flashrom
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH7M", enabling flash write... OK.
Found chip "Macronix MX25L8005" (1024 KB) at physical address 0xfff0.
Found chip "Macronix unknown Macronix SPI chip
.
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rom -c should accept the combination of vendor
and chip name as well, not only the chip name.
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):
* priority: critical => minor
* resolution: => wontfix
* status: new => closed
* component: grub2 => libpayload
* milestone: Port GRUB2 to coreboot =>
Comment:
The usb stack was moved to libpayload, and we stopped developing for
GRUB2. Thus closing this bug.
#12: Make coreboot work on a laptop
-+--
Reporter: uwe | Owner: stepan
Type: task |Status: assigned
Priority: major | Milestone: Going mainstream
Comment(by stepan):
Acked-by: Stefan Reinauer <[EMAIL PROTECTED]>
--
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committed
-+--
Changes (by stepan):
* owner: somebody => stuge
* patchstatus: patch needs review => patch is ready to be committed
--
Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/98#comment:3>
coreboot &l
committed
-+--
Changes (by stuge):
* status: new => closed
* patchstatus: patch is ready to be committed => patch has been
committed
* resolution: => fixed
Comment:
Thanks! Committed in r3562.
--
Ticket URL: <http://tracker.coreboot.or
-+--
in trunk/filo/Makefile, there is duplicated code to get gcc include
directory, the attached patch fixes that.
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review |
-+--
Use dev_path() to have nice debug output
patch is run-time tested
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ywords:
Dependencies: | Patchstatus:
patch needs review
--+-
Comment(by Vincent Legoll <[EMAIL PROTECTED]>):
Argh I screwed this ticket is not for adlo but for coreboot-v2
--
: new
Priority: trivial| Milestone:
Component: coreboot | Version: v2
Resolution: | Ke
closed
Priority: trivial| Milestone:
Component: coreboot | Version: v2
Resolution: fixed | Ke
:
Component: coreboot |Version: v3
Keywords: | Dependencies:
Patchstatus: there is no patch |
-+--
Comment(by uwe):
This should be fixed in v3 since r1045
Version: v3 | Keywords: dtc-parser
Dependencies: | Patchstatus: there is no patch
---+
/Desktop/thinclient/coreboot-v3 % make
CP build/config.h
GEN build/build.h
CC build/lib
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