Dear friends, thank you very much for all your replies - especially to
Felix Held for his research on the possibility of >16 MB SPI flash on
these AMD boards.
> I guess what I’m thinking is I’m not sure it’s worth the effort to make a
> build work for something that is physically impossible
Hmmm
Hi Mike
Same thing as on that AMD platform. Qemu does not support that. In general
x86 will require a special memory map for larger than 16M boot medium, as
below 4G - 16M there are other default MMIO things that will conflict, like
the LAPIC base. That capability to deal with larger flash is only
Hi there Arthur,
since QEMU could be a convenient playground for those who are using
this recent hardware (i.e. they would like to try embedding a small
Linux ISO into a coreboot+SeaBIOS ROM for QEMU and see how it works
from there) - it would've been nice to have this capability
On Tue, Feb 20,
With --ext-win-base now replaced by --mmap (since
https://review.coreboot.org/68160), it should be easier to make the
QEMU Makefiles adapt automatically to the right flash window. I think
if you just add something like
CBFSTOOL_ADD_CMD_OPTIONS += --mmap 0:$(call int-subtract, 0x1
$(CONFIG_
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