Issue #478 has been updated by Robert Gruber.
Affected OS set to xubuntu 22.04 LTS, Trisquel 11.0
Bug #478: X200 booting Linux takes a long time with TSC (`clocksource=hpet`
works)
https://ticket.coreboot.org/issues/478#change-1468
* Author: Robert Grube
Issue #478 has been updated by Robert Gruber.
Bill XIE wrote in #note-4:
> Robert Gruber wrote:
> > dmesg: TSC found unstable after boot, most likely due to broken BIOS. Use
> > 'tsc=unstable'.
> > After a period of time the boot finished by auto-switching to hpet. Setting
> > kernel parameter
Please tell me who I should contact if the following support question should be
directed elsewhere.
I have a System 76 computer with coreboot installed. A fine print error message
flashes that an "overflow" is detected and I think the file path has "grub" in
it. Brief flash, can't see. Is this t
Hi,
Hope you are having a wonderful day.
Kindly requesting if the following two laptops can install coreboot?
Lenovo Yoga 13 Intel Core i7 - Model Number 20175
&
Lenovo Thinkpad X1 Carbon Intel Corei7
Please let me know if any further information is required.
Regards,
Parakawa
_
Hi David,
thanks for your answer.
- I believe XMPP is on a state of revive and always got a lot of improvements
over the last years. There are plenty of clients and some really good working
ones for example Conversations for android (or my own userfriendly fork
monocles chat) or siskin for IPho
Hello Im Artem from Khadas https://www.khadas.com/
We developing new product
our hardware based on: Alder Lake ULT 12th Gen Intel Core i7-1280P
We have plans to use coreboot as alternative bootloader for our new product
We need some information about:
1) coreboot possibilities for current har
Hi,
I installed Coreboot with SeaBIOS on a Supermicro X11SSH-LN4F.
The stock BIOS can read two NVMe drives in a Dual m.2 splitter card inserted in
the middle slot 5 on the motherboard.
But coreboot can not. In the coreboot nconfig menu there is no setting that
will enable bifurcation of the x8 sl
Hi dear Coreboot@ list,
my name is Philipp and a am applying for the Google Summer of Code to
work at Coreboot.
I first thought of working on Power8/9 support, but I think that it
would take a while until I could help you at all with this, so maybe I
will try to contribute there after the GS
Dear Sir
This is Inventec BIOS team, we are trying to port Coreboot to our Server Board
which is based on Intel CRB ArcherCity.
We have to add “Devicetree.cb” files under mainboard folder, right ?
We had read the following files but we are still confused and don’t know how to
modify those files
Issue #478 has been updated by Nico Huber.
Can you provide a dmesg log? or even better, one with coreboot and one with
vendor. It's probably just a flag somewhere that's telling Linux to use TSC.
But that's easiest debugged in the OS.
Bug #478: X200 boo
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