Hello again :-D,
I'm working on a code for a simultaneous use of IGD (GMA950) and x16 PCIe slot
GPU. I've made some success, but the code which handles the IGD initialization
is really weird.
The IGD is initialized by DEVEN register (DEVEN_D2F0 and DEVEN_D2F1 bits),
which is first written in i
Thanks! I would never find the SMRR feature.
Hmm that means 4MB stolen memory should be dropped along 1MB (TSEG can up to
8MB on i945). Or alternatively to check if TSEG >= UMA in cmos configuration. I
suppose cmos.layout would need to support some kind of scripting though.
Petr
Dne 24. 04. 22
Hi Jay.
We do use a self written payload based on a Linux kernel with a userland
application which simply do a kexec to the next kernel.
With this payload we do boot into a Linux on an eMMC on one of our Elkhart
Lake designs.
With iPXE I do not have any experience on Elkhart Lake.
Werner
> From
Dne 25. 04. 22 v 7:51 Arthur Heymans napsal(a):
> 4MB IGD stolen memory is fine for 2M alignment on TSEG, so only dropping 1M
> would be needed.
Yeah but TSEG can have 8MB and will require 8MB alignment (however I don't know
if this setting is used in coreboot).
Petr
> Also that value goes up
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