Dear Max,
Am 22.04.20 um 23:11 schrieb Max Zim:
I discovered the issue with Memtest86+ stuck on my Thinkpad x230 on the
very first tests. Always on the same point, 52%. Every release since 4.8
works this way, coreboot 4.7 works fine. Is this a known bug?
Thank you for your report. I cannot
Hello,
Am I correct that the problem still exists that SeaBios can't find the CBFS in
apl platform?
Kind regards,
Wolfgang Kamp
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On 23/04/2020 09:24, Paul Menzel wrote:
1. How do you build the Memtest86+ payload?
2. What version do you choose? I believe there is *Stable* and *Master*?
I just checked the box in the nconfig menu, so it should be Stable as
defined in the coreboot's automated build flow.
3. How do you
Dear Max,
Am 23.04.20 um 11:28 schrieb Max Zim:
On 23/04/2020 09:24, Paul Menzel wrote:
1. How do you build the Memtest86+ payload?
2. What version do you choose? I believe there is *Stable* and *Master*?
I just checked the box in the nconfig menu, so it should be Stable as
defined in the
On 23/04/2020 12:07, Paul Menzel wrote:
Ok, so you are using SeaBIOS as primary payload.
Correct.
So, coreboot master with Memtest86+ Stable does *not* work. coreboot
master with Memtest86+ Master *does* work?
Correct.
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Dear Max,
Am 23.04.20 um 12:34 schrieb Max Zim:
On 23/04/2020 12:07, Paul Menzel wrote:
So, coreboot master with Memtest86+ Stable does *not* work. coreboot
master with Memtest86+ Master *does* work?
Correct.
The Memtest86+ stable tag was changed to v002 in coreboot 4.10 in commit
af15d
Hello,
Hello Max,
I discovered the issue with Memtest86+ stuck on my Thinkpad x230 on
the very first tests. Always on the same point, 52%. Every release
since 4.8 works this way, coreboot 4.7 works fine. Is this a known bug?
Please try to apply the patch I did some time ago [1]. It is exac
On 23/04/2020 13:06, Krystian Hebel wrote:
Please try to apply the patch I did some time ago [1].
Unfortunately it does not work for me. I applied patch manually,
switched back to the Stable Memtest86+ and ran `make clean && make`;
memory test hanged at the same point. Checked twice.
_
Hi,
I am using coreboot to boot Denverton cpu (CPU C3558) based board.
I can see that the cpu frequency is set to the correct value i.e. "2200 Mhz"
under the coreboot logs.
.
"
CPU #3 initialized
bsp_do_flight_plan done after 146 msecs.
cpu: frequency set to 2200
"
Later when I check the freque
Hi Nitin,
Look`s like SpeedStepping in action - correct behavior while on idle.
Please put more stress on CPU and recheck - It should jump back to 2200
BR,
Mariusz
-Original Message-
From: nitin.ramesh.si...@gmail.com
Sent: czwartek, 23 kwietnia 2020 14:36
To: coreboot@coreboot.org
Sub
On 23/04/2020 12:45, Paul Menzel wrote:
It’d be great, if you could bisect the commit
2182c5b is the first "good" commit.
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On Thu, Apr 23, 2020 at 6:46 AM Paul Menzel wrote:
> PS: By the way, Memtest86+ 5.31b was released [2].
>
> [1]: https://review.coreboot.org/c/coreboot/+/32613
> [2]: https://www.memtest.org/
That's huge! Thanks for picking up development.
--
LAN Engineer * NOC and IT Infrastructure Maintenan
Apollolake should work with:
CONFIG_CBFS_LOCATION=0xfffb1000
# CONFIG_HARDWARE_IRQ is not set
That's what I use for SeaBIOS as a legacy boot payload on ChromeOS devices,
but the CBFS address will be the same if using upstream coreboot
regards,
Matt
On Thu, Apr 23, 2020 at 3:24 AM Wolfgang Kamp
Hi Mariusz,
I tried running the stress test to increase the load average, but still the
frequency stays at 800Mhz.
Thanks,
Nitin.
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On Thu, Apr 23, 2020 at 5:42 PM R S wrote:
>
> On Thu, Apr 23, 2020 at 6:46 AM Paul Menzel wrote:
>>
>> PS: By the way, Memtest86+ 5.31b was released [2].
>>
>> [1]: https://review.coreboot.org/c/coreboot/+/32613
>> [2]: https://www.memtest.org/
>
>
> That's huge! Thanks for picking up developmen
Hi Patrick,
> 1. If you have anything big that you want to get in before the release,
Can we get [38354] merged before 4.12 is cut? This is the last patch
needed to get onboard SCSI on Asus P2B-LS working - all its
prerequisites have been merged.
I have a new board and more 440BX platform stuff
Hi Patrick,
Your help and dedication is much appreciated!
As we (FB and its partners) successfully finished bring-up of coreboot on
CooperLake-SP based
1 socket platform, we are shifting our focus to exclusively on Cooperlake-SP
based platfroms, away
from using Skylake-SP based TiogaPass as th
Hello Nitin,
Since you are running Linux, do you see anything interesting in the output
of dmesg? You could filter for warnings and errors by running "dmesg -l
warn,err", but it might be better to provide the full log.
Recently, I have started experiencing a similar issue with a i7-3720QM and
T42
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