https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/77124
>From 9baa732a2ab5d26b975efe9ed093d8e56ff6129c Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 5 Jan 2024 01:17:39 +
Subject: [PATCH] [mlir][sparse][CRunnerUtils] Add shuffle and shuffleFree in
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/77124
>From 9baa732a2ab5d26b975efe9ed093d8e56ff6129c Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 5 Jan 2024 01:17:39 +
Subject: [PATCH 1/2] [mlir][sparse][CRunnerUtils] Add shuffle and shuffleFree
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/77124
>From 9baa732a2ab5d26b975efe9ed093d8e56ff6129c Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 5 Jan 2024 01:17:39 +
Subject: [PATCH 1/2] [mlir][sparse][CRunnerUtils] Add shuffle and shuffleFree
https://github.com/yinying-lisa-li ready_for_review
https://github.com/llvm/llvm-project/pull/77124
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https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/77124
>From 1c774e6c6ae3c5c7be9291677651d20c8979c7f5 Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 5 Jan 2024 01:17:39 +
Subject: [PATCH 1/6] [mlir][sparse][CRunnerUtils] Add shuffle and shuffleFree
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/77682
>From abb4cfff1b74a34f074e3feccb5c03598ba48e64 Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Wed, 10 Jan 2024 20:00:32 +
Subject: [PATCH] [mlir][verifyMemref] Fix bug and support more types for
ver
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/79935
>From b4610de041d1fd9c362a4155ee50325c738eebda Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 30 Jan 2024 01:01:52 +
Subject: [PATCH 01/13] [mlir][sparse] Expand LevelType to 64 bit and implemen
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/78000
>From 3d2716ad6088f600c14d6ff724aa90453130a1f7 Mon Sep 17 00:00:00 2001
From: Yeoul Na
Date: Mon, 18 Dec 2023 10:58:16 +0900
Subject: [PATCH 01/13] [BoundsSafety] Introduce CountAttributedType
CountAttri
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/79935
>From fa5210448dea1f88d8e0a242543ad1be655087e0 Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 30 Jan 2024 01:01:52 +
Subject: [PATCH 1/3] [mlir][sparse] Expand LevelType to 64 bit and implement
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/80501
>From 1754868fc5f600ff59fac02d21ce9a37dc9ebcad Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 2 Feb 2024 22:08:10 +
Subject: [PATCH 1/7] [mlir][sparse] Change enum to be 64 bit
---
mlir/includ
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/79935
>From fa5210448dea1f88d8e0a242543ad1be655087e0 Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 30 Jan 2024 01:01:52 +
Subject: [PATCH 1/3] [mlir][sparse] Expand LevelType to 64 bit and implement
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/67569
>From 0f1db4000d971192e0b2b027746cdd37083bf87f Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Wed, 27 Sep 2023 14:51:34 +
Subject: [PATCH] [mlir][sparse] Change tests to use new syntax for ELL and
s
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/67569
>From 0f1db4000d971192e0b2b027746cdd37083bf87f Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Wed, 27 Sep 2023 14:51:34 +
Subject: [PATCH] [mlir][sparse] Change tests to use new syntax for ELL and
s
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/67569
>From 0f1db4000d971192e0b2b027746cdd37083bf87f Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Wed, 27 Sep 2023 14:51:34 +
Subject: [PATCH 1/2] [mlir][sparse] Change tests to use new syntax for ELL an
@@ -240,8 +240,9 @@ def SparseTensorEncodingAttr :
SparseTensor_Attr<"SparseTensorEncoding",
// CSR slice (offset = 0, size = 4, stride = 1 on the first dimension;
yinying-lisa-li wrote:
Done!
https://github.com/llvm/llvm-project/pull/67569
___
@@ -240,8 +240,9 @@ def SparseTensorEncodingAttr :
SparseTensor_Attr<"SparseTensorEncoding",
// CSR slice (offset = 0, size = 4, stride = 1 on the first dimension;
// offset = 0, size = 8, and a dynamic stride on the second dimension).
#CSR_SLICE = #sparse_tensor.e
@@ -240,8 +240,9 @@ def SparseTensorEncodingAttr :
SparseTensor_Attr<"SparseTensorEncoding",
// CSR slice (offset = 0, size = 4, stride = 1 on the first dimension;
// offset = 0, size = 8, and a dynamic stride on the second dimension).
#CSR_SLICE = #sparse_tensor.e
https://github.com/yinying-lisa-li closed
https://github.com/llvm/llvm-project/pull/67569
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https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/67845
>From ab46cf0f76aeaa78f2eb8865d647400f810e35ec Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 29 Sep 2023 19:09:21 +
Subject: [PATCH] [mlir][sparse] Update Enum name for CompressedWithHigh
Chan
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/67845
>From ab46cf0f76aeaa78f2eb8865d647400f810e35ec Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Fri, 29 Sep 2023 19:09:21 +
Subject: [PATCH] [mlir][sparse] Update Enum name for CompressedWithHigh
Chan
https://github.com/yinying-lisa-li closed
https://github.com/llvm/llvm-project/pull/67845
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https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/2] [mlir][sparse] Print new syntax
Printing changes from #s
https://github.com/yinying-lisa-li edited
https://github.com/llvm/llvm-project/pull/68130
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https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/3] [mlir][sparse] Print new syntax
Printing changes from #s
@@ -533,7 +533,7 @@ func.func @sparse_compression(%tensor: tensor<8x8xf64,
#CSR>,
// CHECK: %[[A13:.*]]:4 = scf.for %[[A14:.*]] = %[[A11]] to %[[A7]]
step %[[A12]] iter_args(%[[A15:.*]] = %[[A0]], %[[A16:.*]] = %[[A1]],
%[[A17:.*]] = %[[A2]], %[[A18:.*]] = %[[A3]]) -
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/4] [mlir][sparse] Print new syntax
Printing changes from #s
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/4] [mlir][sparse] Print new syntax
Printing changes from #s
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/4] [mlir][sparse] Print new syntax
Printing changes from #s
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/5] [mlir][sparse] Print new syntax
Printing changes from #s
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/68130
>From 47b34bb327e1078678d3ba0c96ebce3fc89cf2ae Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 3 Oct 2023 16:43:50 +
Subject: [PATCH 1/5] [mlir][sparse] Print new syntax
Printing changes from #s
@@ -729,3 +729,92 @@ Value sparse_tensor::createOrFoldSliceStrideOp(OpBuilder
&builder, Location loc,
return constantIndex(builder, loc, *stride);
return builder.create(loc, tensor, APInt(64, dim));
}
+
+void sparse_tensor::fillDimShape(OpBuilder &builder, Location loc,
https://github.com/yinying-lisa-li approved this pull request.
https://github.com/llvm/llvm-project/pull/68360
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