RKSimon wrote:
Anyway you can test that?
https://github.com/llvm/llvm-project/pull/112129
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Author: Simon Pilgrim
Date: 2024-10-08T12:19:27+01:00
New Revision: 1312369afbeb2083094b3d34a88c346b22e86971
URL:
https://github.com/llvm/llvm-project/commit/1312369afbeb2083094b3d34a88c346b22e86971
DIFF:
https://github.com/llvm/llvm-project/commit/1312369afbeb2083094b3d34a88c346b22e86971.diff
Author: Simon Pilgrim
Date: 2024-10-08T11:16:13+01:00
New Revision: e3e55173ed891da334990103c12206a4e4e8fc98
URL:
https://github.com/llvm/llvm-project/commit/e3e55173ed891da334990103c12206a4e4e8fc98
DIFF:
https://github.com/llvm/llvm-project/commit/e3e55173ed891da334990103c12206a4e4e8fc98.diff
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/111435
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Author: Simon Pilgrim
Date: 2024-10-10T12:49:56+01:00
New Revision: 8306114ed2313a7febdb0d0d0c31df357ed53fdd
URL:
https://github.com/llvm/llvm-project/commit/8306114ed2313a7febdb0d0d0c31df357ed53fdd
DIFF:
https://github.com/llvm/llvm-project/commit/8306114ed2313a7febdb0d0d0c31df357ed53fdd.diff
Author: Simon Pilgrim
Date: 2024-10-04T09:54:13+01:00
New Revision: 992e75403f417d46ce9015147ff49d67009e736c
URL:
https://github.com/llvm/llvm-project/commit/992e75403f417d46ce9015147ff49d67009e736c
DIFF:
https://github.com/llvm/llvm-project/commit/992e75403f417d46ce9015147ff49d67009e736c.diff
Author: Simon Pilgrim
Date: 2024-10-07T17:36:18+01:00
New Revision: f07e1c86199eeac609900f42edb22e1faf461ef2
URL:
https://github.com/llvm/llvm-project/commit/f07e1c86199eeac609900f42edb22e1faf461ef2
DIFF:
https://github.com/llvm/llvm-project/commit/f07e1c86199eeac609900f42edb22e1faf461ef2.diff
Author: Simon Pilgrim
Date: 2024-10-07T14:10:39+01:00
New Revision: 5dc7a5e50bd21cc818a3a71691af9780291b75b2
URL:
https://github.com/llvm/llvm-project/commit/5dc7a5e50bd21cc818a3a71691af9780291b75b2
DIFF:
https://github.com/llvm/llvm-project/commit/5dc7a5e50bd21cc818a3a71691af9780291b75b2.diff
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/111001
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Author: Simon Pilgrim
Date: 2024-10-07T15:57:21+01:00
New Revision: aa656366ce9a693fce6a4f16090d250a8059df46
URL:
https://github.com/llvm/llvm-project/commit/aa656366ce9a693fce6a4f16090d250a8059df46
DIFF:
https://github.com/llvm/llvm-project/commit/aa656366ce9a693fce6a4f16090d250a8059df46.diff
Author: Simon Pilgrim
Date: 2024-10-07T15:57:22+01:00
New Revision: f71d62178d9c97ac650a8454403d71cbc8fd8c9d
URL:
https://github.com/llvm/llvm-project/commit/f71d62178d9c97ac650a8454403d71cbc8fd8c9d
DIFF:
https://github.com/llvm/llvm-project/commit/f71d62178d9c97ac650a8454403d71cbc8fd8c9d.diff
Author: Simon Pilgrim
Date: 2024-10-07T15:57:22+01:00
New Revision: aa4d94839e6bb30389deb3339fb0d0e4aa8baa4e
URL:
https://github.com/llvm/llvm-project/commit/aa4d94839e6bb30389deb3339fb0d0e4aa8baa4e
DIFF:
https://github.com/llvm/llvm-project/commit/aa4d94839e6bb30389deb3339fb0d0e4aa8baa4e.diff
Author: Simon Pilgrim
Date: 2024-10-07T15:57:22+01:00
New Revision: f15fe73d234a3c41f9cb905106517a89bab3add4
URL:
https://github.com/llvm/llvm-project/commit/f15fe73d234a3c41f9cb905106517a89bab3add4
DIFF:
https://github.com/llvm/llvm-project/commit/f15fe73d234a3c41f9cb905106517a89bab3add4.diff
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/112578
I'm hoping to make a large proportion of the SSE/AVX intrinsics usable in
constant expressions - eventually anything that doesn't touch memory or system
settings - making it much easier to utilize SSE/AVX intri
Author: Simon Pilgrim
Date: 2024-10-16T17:15:47+01:00
New Revision: cf5e295ec0e05058d0e10a3779fe4093d96074b2
URL:
https://github.com/llvm/llvm-project/commit/cf5e295ec0e05058d0e10a3779fe4093d96074b2
DIFF:
https://github.com/llvm/llvm-project/commit/cf5e295ec0e05058d0e10a3779fe4093d96074b2.diff
https://github.com/RKSimon approved this pull request.
LGTM with one minor
https://github.com/llvm/llvm-project/pull/80309
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@@ -28729,7 +28731,7 @@ static SDValue GenerateFixedLengthSVETBL(SDValue Op,
SDValue Op1, SDValue Op2,
unsigned BitsPerElt = VTOp1.getVectorElementType().getSizeInBits();
unsigned IndexLen = MinSVESize / BitsPerElt;
unsigned ElementsPerVectorReg = VTOp1.getVectorNumEleme
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/80309
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@@ -6,13 +6,23 @@
#include
+#if defined(__cplusplus) && (__cplusplus >= 201103L)
+constexpr bool match_m128(__m128 v, float x, float y, float z, float w) {
+ return v[0] == x && v[1] == y && v[2] == z && v[3] == w;
RKSimon wrote:
I'd prefer to keep the mat
@@ -6,13 +6,23 @@
#include
+#if defined(__cplusplus) && (__cplusplus >= 201103L)
+constexpr bool match_m128(__m128 v, float x, float y, float z, float w) {
+ return v[0] == x && v[1] == y && v[2] == z && v[3] == w;
+}
+#define TEST_CONSTEXPR(...) static_assert(__VA_ARGS__)
Author: Simon Pilgrim
Date: 2024-10-10T11:30:31+01:00
New Revision: 003375fb2b62967580712a704934927553fe540f
URL:
https://github.com/llvm/llvm-project/commit/003375fb2b62967580712a704934927553fe540f
DIFF:
https://github.com/llvm/llvm-project/commit/003375fb2b62967580712a704934927553fe540f.diff
https://github.com/RKSimon approved this pull request.
https://github.com/llvm/llvm-project/pull/112129
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@@ -171,7 +171,7 @@ bool HexagonGenExtract::convert(Instruction *In) {
// this value.
if (!LogicalSR && (SR > SL))
return false;
-APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL);
+APInt A = APInt(BW, ~0ULL, true).lshr(SR).shl(SL);
RKSimon wrot
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/112578
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RKSimon wrote:
No objections to this patch, I do want to see other targets moved over as well
though, instead of x86 ending up being treated as a special/weird case.
I am preparing to convert a lot of x86 builtins to be constexpr (#30794) - but
as long as this PR won't interfere I see no big r
@@ -1,7 +1,7 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
// REQUIRES: x86-registered-target
-// RUN: %clang_cc1 -ffreestanding %s -O3 -triple=x86_64-apple-darwin
-target-feature +avx -emit-llvm -o - | FileCheck %s --ch
Author: Simon Pilgrim
Date: 2024-10-29T15:39:15Z
New Revision: bf6c483e4714841b1511ea3666f05a468bd988fe
URL:
https://github.com/llvm/llvm-project/commit/bf6c483e4714841b1511ea3666f05a468bd988fe
DIFF:
https://github.com/llvm/llvm-project/commit/bf6c483e4714841b1511ea3666f05a468bd988fe.diff
LOG:
Author: Simon Pilgrim
Date: 2024-10-29T14:34:19Z
New Revision: f257e9bdbbb790e4fe0a5e2538c92d7edd85a2e5
URL:
https://github.com/llvm/llvm-project/commit/f257e9bdbbb790e4fe0a5e2538c92d7edd85a2e5
DIFF:
https://github.com/llvm/llvm-project/commit/f257e9bdbbb790e4fe0a5e2538c92d7edd85a2e5.diff
LOG:
Author: Simon Pilgrim
Date: 2024-10-29T14:34:19Z
New Revision: e281d96a81bca896692da4a07ca1423ee6dc1f53
URL:
https://github.com/llvm/llvm-project/commit/e281d96a81bca896692da4a07ca1423ee6dc1f53
DIFF:
https://github.com/llvm/llvm-project/commit/e281d96a81bca896692da4a07ca1423ee6dc1f53.diff
LOG:
https://github.com/RKSimon approved this pull request.
https://github.com/llvm/llvm-project/pull/106005
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@@ -745,12 +745,8 @@ Let ``VT`` be a vector type and ``ET`` the element type of
``VT``.
===
==
==
NameO
RKSimon wrote:
CC @rohitaggarwal007 who added sincos vectorisation for amdlibm recently -
hopefully we can get ensure amdlibm uses the new builtin + intrinsic safely
https://github.com/llvm/llvm-project/pull/114086
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Author: Simon Pilgrim
Date: 2024-10-25T18:11:28+01:00
New Revision: f24c1dd08ea71fa7334a85fd2772c2f728de0c56
URL:
https://github.com/llvm/llvm-project/commit/f24c1dd08ea71fa7334a85fd2772c2f728de0c56
DIFF:
https://github.com/llvm/llvm-project/commit/f24c1dd08ea71fa7334a85fd2772c2f728de0c56.diff
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/112578
>From 38bd7c77c29457f7f20ccf7e6ee8c895707ab07c Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Wed, 16 Oct 2024 17:31:31 +0100
Subject: [PATCH 1/2] [X86][RFC] Refactor the SSE intrinsics constexpr tests to
s
@@ -705,66 +705,74 @@ float4 cosh(float4);
#ifdef __HLSL_ENABLE_16_BIT
_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_popcount)
-int16_t countbits(int16_t);
+constexpr uint countbits(int16_t x) {
+ return __builtin_elementwise_popcount(x);
---
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/113714
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https://github.com/RKSimon approved this pull request.
https://github.com/llvm/llvm-project/pull/113871
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@@ -1,7 +1,7 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
// REQUIRES: x86-registered-target
-// RUN: %clang_cc1 -ffreestanding %s -O3 -triple=x86_64-apple-darwin
-target-feature +avx -emit-llvm -o - | FileCheck %s --ch
@@ -1,6 +1,6 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -O3
-triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -O3
-triple=i386-apple-darwin -target-featu
https://github.com/RKSimon approved this pull request.
LGTM with minors
https://github.com/llvm/llvm-project/pull/113714
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Author: Simon Pilgrim
Date: 2024-10-28T11:45:36Z
New Revision: d6d4569dd90261bc8cdb3d1c3c2204cde1fe566f
URL:
https://github.com/llvm/llvm-project/commit/d6d4569dd90261bc8cdb3d1c3c2204cde1fe566f
DIFF:
https://github.com/llvm/llvm-project/commit/d6d4569dd90261bc8cdb3d1c3c2204cde1fe566f.diff
LOG:
RKSimon wrote:
I've added builtin_test_helpers.h header to share the comparison code - if
there's no objections I'll push this tomorrow.
https://github.com/llvm/llvm-project/pull/112578
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Author: Simon Pilgrim
Date: 2024-11-08T15:30:02Z
New Revision: c9552283c0bf277eba490cde9fd913510f4111c0
URL:
https://github.com/llvm/llvm-project/commit/c9552283c0bf277eba490cde9fd913510f4111c0
DIFF:
https://github.com/llvm/llvm-project/commit/c9552283c0bf277eba490cde9fd913510f4111c0.diff
LOG:
RKSimon wrote:
@c8ef why did you close this?
https://github.com/llvm/llvm-project/pull/114637
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@@ -745,12 +745,10 @@ Let ``VT`` be a vector type and ``ET`` the element type
of ``VT``.
===
==
==
Name
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/114637
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Author: Simon Pilgrim
Date: 2024-10-31T11:50:19Z
New Revision: fcaa8c6e2240a950d3d86fb723d9b0a363b7346a
URL:
https://github.com/llvm/llvm-project/commit/fcaa8c6e2240a950d3d86fb723d9b0a363b7346a
DIFF:
https://github.com/llvm/llvm-project/commit/fcaa8c6e2240a950d3d86fb723d9b0a363b7346a.diff
LOG:
Author: Simon Pilgrim
Date: 2024-11-08T15:30:02Z
New Revision: 2407ff4645e9124507a4b5d910603ff7fc9e5734
URL:
https://github.com/llvm/llvm-project/commit/2407ff4645e9124507a4b5d910603ff7fc9e5734
DIFF:
https://github.com/llvm/llvm-project/commit/2407ff4645e9124507a4b5d910603ff7fc9e5734.diff
LOG:
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109405
>From 657f1c0369a2befecdca26235f231bfd9ab55e9b Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 20 Sep 2024 12:36:27 +0100
Subject: [PATCH 1/2] [clang][wasm] Replace the target integer sub saturate
intri
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109405
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https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109577
This is an initial patch for constexpr handling of the BEXTR intrinsics - the
plan is to support all x86 bit manipulation intrinsics eventually (and then
SSE/AVX intrinsics), but I wanted to treat this as an in
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109577
>From 250338c42d61cb6870015679453e726aa0342b9e Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Sun, 22 Sep 2024 15:00:03 +0100
Subject: [PATCH 1/2] [clang][x86] Add constexpr support for BMI/TBM BEXTR
intrin
RKSimon wrote:
@aniplcc reverse ping?
https://github.com/llvm/llvm-project/pull/94161
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RKSimon wrote:
ping - any thoughts on this?
https://github.com/llvm/llvm-project/pull/109577
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RKSimon wrote:
@aniplcc Are you still wanting to work on this? Otherwise I'd like to
commandeer and complete the patch to get it into trunk.
https://github.com/llvm/llvm-project/pull/94161
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https:
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109577
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109160
>From dcbe496df1ce109167e07136d2a7e8f65232f812 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 12 Sep 2024 10:39:26 +0100
Subject: [PATCH] [clang][powerpc][wasm][systemz][x86] Replace target vector
popc
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109160
>From aee207dd6246128e3f532cbf9b36f4ea9b5a1a5a Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 12 Sep 2024 10:39:26 +0100
Subject: [PATCH] [clang][powerpc][wasm][systemz][x86] Replace target vector
popc
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109269
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https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109259
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RKSimon wrote:
Officially we don't guarantee target intrinsics at all - but I can add a
release note if it will help?
https://github.com/llvm/llvm-project/pull/109160
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RKSimon wrote:
@nemanjai Are you OK with the PPC changes?
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109405
Remove the Intrinsic::wasm_sub_sat_signed/wasm_sub_sat_unsigned entries and
just use sub_sat_s/sub_sat_u directly
>From a2d179a10a5a0c9eb1baa7fba82ec0944622619e Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Dat
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/110508
None
>From 0cb0f899c185bb729e1ee2f48d78d4ef81d0ace9 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Mon, 30 Sep 2024 14:16:31 +0100
Subject: [PATCH] [clang][x86] Add constexpr support for BZHI intrinsics
--
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/110499
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/110508
>From ef0ee711abb4568f9da2de7f54e45141330d03c7 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Mon, 30 Sep 2024 14:16:31 +0100
Subject: [PATCH] [clang][x86] Add constexpr support for BZHI intrinsics
---
cla
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/110515
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https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/110508
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/110515
>From dd3eb487d065ef276b7ec13ac3f6d4c8d62d5f4b Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Mon, 30 Sep 2024 15:25:34 +0100
Subject: [PATCH] [clang][x86] Add constexpr support for all remaining TBM
intrin
Author: Simon Pilgrim
Date: 2024-09-30T17:57:12+01:00
New Revision: 511439b2821de3ea34612061a57deb71a8201c7c
URL:
https://github.com/llvm/llvm-project/commit/511439b2821de3ea34612061a57deb71a8201c7c
DIFF:
https://github.com/llvm/llvm-project/commit/511439b2821de3ea34612061a57deb71a8201c7c.diff
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/110535
None
>From dd0a2928258eb083799dab03dff3a2f0b8a5f664 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Mon, 30 Sep 2024 17:48:46 +0100
Subject: [PATCH] [clang][x86] Add constexpr support for PDEP/PEXT intrinsic
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/110499
None
>From b61842abda168ea02bb6b25598ce6d08757bb4f7 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Mon, 30 Sep 2024 13:21:42 +0100
Subject: [PATCH] [clang][x86] Add constexpr support for LZCNT/TZCNT intrins
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/110499
>From b61842abda168ea02bb6b25598ce6d08757bb4f7 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Mon, 30 Sep 2024 13:21:42 +0100
Subject: [PATCH 1/2] [clang][x86] Add constexpr support for LZCNT/TZCNT
intrinsi
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/110515
BEXTRI is already handled, so we just need to tag the rest of the intrinsics,
which are all expanded to generic patterns.
As these are expanded I felt it better to test against the equivalent pattern
instead o
Author: Simon Pilgrim
Date: 2024-10-01T11:21:22+01:00
New Revision: e96f7788f5176dcf39c4eb53e4146f1e791adf83
URL:
https://github.com/llvm/llvm-project/commit/e96f7788f5176dcf39c4eb53e4146f1e791adf83
DIFF:
https://github.com/llvm/llvm-project/commit/e96f7788f5176dcf39c4eb53e4146f1e791adf83.diff
Author: Simon Pilgrim
Date: 2024-10-01T18:04:40+01:00
New Revision: 74cfd203c36d314e3a47c3e239776a1a90424531
URL:
https://github.com/llvm/llvm-project/commit/74cfd203c36d314e3a47c3e239776a1a90424531
DIFF:
https://github.com/llvm/llvm-project/commit/74cfd203c36d314e3a47c3e239776a1a90424531.diff
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/110668
>From cd62ac98f0df8db5f2458efc87e5d40b36ba8469 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Tue, 1 Oct 2024 14:22:49 +0100
Subject: [PATCH 1/2] [clang][x86] Add constexpr support for ADC/SBB + ADX
intrins
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/110668
ADC and ADX use the same internal intrinsics - for testing I've taken a same
approach as the generic builtin overfloaw tests, putting the intrinsics in a
constexpr test wrapper and comparing the carry/result va
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/110654
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https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/94161
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https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/110581
BEXTR/TZCNT are already handled, so we just need to tag the rest of the
intrinsics, which are all expanded to generic patterns.
>From 6dd203077d78ea7d757ab775a0a61b365c3359b8 Mon Sep 17 00:00:00 2001
From: Simo
RKSimon wrote:
Closing as these have now all been addressed
https://github.com/llvm/llvm-project/pull/94161
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/110654
>From bb035536e40219a725186554d0536d58895e7797 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Tue, 1 Oct 2024 13:04:04 +0100
Subject: [PATCH 1/2] [clang][x86] Add constexpr support for MULX intrinsics
With
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/110668
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@@ -23,7 +23,7 @@
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_popcnt_epi16(__m512i __A)
{
- return (__m512i) __builtin_ia32_vpopcntw_512((__v32hi) __A);
+ return (__m512i)__builtin_elementwise_popcount((__v32hi)__A);
RKSimon wrote:
I've updated all t
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109160
>From 3b9c6daf70ab26224d619f4beede2aaf94ed19bd Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 12 Sep 2024 10:39:26 +0100
Subject: [PATCH] [clang][powerpc][wasm][systemz][x86] Replace target vector
popc
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109160
Now that we have the C++ `__builtin_elementwise_popcount` intrinsic (#108121) -
replace custom target intrinsics that just immediately map to Intrinsic::ctpop
so use the generic intrinsic for simplicity.
>From
https://github.com/RKSimon ready_for_review
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109269
>From 97dd8d7e892203e6073ebab271967e743fe194fa Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 19 Sep 2024 11:37:46 +0100
Subject: [PATCH] [clang][wasm] Replace the target integer add saturate
intrinsic
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109269
Noticed while working on #109160
I've left out the sub_sat intrinsics for now - not sure about the history
behind them using Intrinsic::wasm_sub_sat_* instead of Intrinsic::*sub_sat
>From 59827162bac77248118ec
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109259
Noticed while working on #109160
>From 8b909be1991bcace334149ace393cf3e679f856b Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Wed, 18 Sep 2024 22:19:19 +0100
Subject: [PATCH] [clang][wasm] Replace the targ
RKSimon wrote:
@phoebewang Are you OK with this?
https://github.com/llvm/llvm-project/pull/110668
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https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/110668
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Author: Simon Pilgrim
Date: 2024-10-03T11:31:39+01:00
New Revision: 200dd6fb1764389cd57dc09575c7883d8fb02764
URL:
https://github.com/llvm/llvm-project/commit/200dd6fb1764389cd57dc09575c7883d8fb02764
DIFF:
https://github.com/llvm/llvm-project/commit/200dd6fb1764389cd57dc09575c7883d8fb02764.diff
Author: Simon Pilgrim
Date: 2024-10-03T11:31:39+01:00
New Revision: 1ba19d6c49663a35baf5d6cdc4a149e2aca9ae6c
URL:
https://github.com/llvm/llvm-project/commit/1ba19d6c49663a35baf5d6cdc4a149e2aca9ae6c
DIFF:
https://github.com/llvm/llvm-project/commit/1ba19d6c49663a35baf5d6cdc4a149e2aca9ae6c.diff
Author: Simon Pilgrim
Date: 2024-10-03T13:08:34+01:00
New Revision: a62a80cc80b7ad835a10047c970171f6f310e26b
URL:
https://github.com/llvm/llvm-project/commit/a62a80cc80b7ad835a10047c970171f6f310e26b
DIFF:
https://github.com/llvm/llvm-project/commit/a62a80cc80b7ad835a10047c970171f6f310e26b.diff
Author: Simon Pilgrim
Date: 2024-10-03T13:08:34+01:00
New Revision: 7c50c1e73bc959246933d294319391e762bb05d5
URL:
https://github.com/llvm/llvm-project/commit/7c50c1e73bc959246933d294319391e762bb05d5
DIFF:
https://github.com/llvm/llvm-project/commit/7c50c1e73bc959246933d294319391e762bb05d5.diff
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