shiltian wrote:
The OpenMP failure has nothing to do with this PR. Please update ROCm to a
version that supports COV6.
https://github.com/llvm/llvm-project/pull/118515
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shiltian wrote:
> The IR is a representation of what goes on a final .o. It is not really
> intended to enable new features or make the program portable.
My .02 is, it depends on how to think about it. If we eliminate the "unwanted"
part (especially those that could potentially affect ABI) at
shiltian wrote:
Supposedly you can revert the revert to get the reapply.
https://github.com/llvm/llvm-project/pull/118907
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shiltian wrote:
Worth a bullet point in release note, both clang and openmp/offload.
https://github.com/llvm/llvm-project/pull/119091
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shiltian wrote:
> This probably should retain separate wave32/wave64 builds. Additionally,
> should have extension points for subtarget specific implementations
Does wave32/wave64 affect the lowering from front end source code to middle end
IR, if we don't use certain functions, such as wave l
@@ -141,20 +109,21 @@ set(bc_flags -c -foffload-lto -std=c++17
-fvisibility=hidden
# first create an object target
add_library(omptarget.devicertl.all_objs OBJECT IMPORTED)
-function(compileDeviceRTLLibrary target_cpu target_name target_triple)
+function(compileDeviceRTLLibra
@@ -141,20 +109,21 @@ set(bc_flags -c -foffload-lto -std=c++17
-fvisibility=hidden
# first create an object target
add_library(omptarget.devicertl.all_objs OBJECT IMPORTED)
-function(compileDeviceRTLLibrary target_cpu target_name target_triple)
+function(compileDeviceRTLLibra
https://github.com/shiltian commented:
I like this method, but just out of curiosity, did we use anything in AMDGPU
implementation that has target dependent lowering in the front end? If not,
this is totally fine I'd say.
https://github.com/llvm/llvm-project/pull/119091
___
@@ -74,49 +72,53 @@ static int32_t nvptx_parallel_reduce_nowait(void
*reduce_data,
uint32_t NumThreads = omp_get_num_threads();
if (NumThreads == 1)
return 1;
-/*
- * This reduce function handles reduction within a team. It handles
- * parallel regions in b
https://github.com/shiltian approved this pull request.
it seems like there are some test failures but I think the PR looks good
https://github.com/llvm/llvm-project/pull/119091
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shiltian wrote:
> So this is wrong. It was correct for openmp.
Even OpenMP is discussing to introduce multi-dim support, though in LLVM I
already implemented it as an extension. :-)
https://github.com/llvm/llvm-project/pull/119009
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shiltian wrote:
> > I like this method, but just out of curiosity, did we use anything in
> > AMDGPU implementation that has target dependent lowering in the front end?
> > If not, this is totally fine I'd say.
>
> We used to use the `__AMDGCN_WAVEFRONT_SIZE` but that was removed for
> unrela
shiltian wrote:
This PR introduced a new compile warning when compiling using clang. Please fix
it.
```
llvm-project/clang/lib/Driver/ToolChains/SYCL.cpp:35:10: warning: returning
address of local temporary object [-Wreturn-stack-address]
35 | return {
| ^
36 | opt
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 76db8c65328736fae39bd6f7585f8274e9f34143 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Dec 2024 23:50:06 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -52,6 +52,12 @@ class AMDGPUABIInfo final : public DefaultABIInfo {
void computeInfo(CGFunctionInfo &FI) const override;
RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
AggValueSlot Slot) const override;
+
+ llvm::FixedVectorTy
@@ -1,77 +0,0 @@
-// RUN: %clang_cc1 %s -emit-llvm -o - -triple spir-unknown-unknown
-fpreserve-vec3-type | FileCheck %s
-
-typedef char char3 __attribute__((ext_vector_type(3)));
shiltian wrote:
The point of the test is for preserving vec3, as the name of the f
@@ -94,43 +94,43 @@ typedef double __attribute__((ext_vector_type(16)))
double16;
// CHECK-LABEL: @local_memory_alignment_global(
// CHECK: store volatile i8 0, ptr addrspace(3)
@local_memory_alignment_global.lds_i8, align 1
// CHECK: store volatile <2 x i8> zeroinitializer,
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/104661
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https://github.com/llvm/llvm-project/pull/104661
>From e4759cadf07aa883ca0d9ca8582dbd02fc028478 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 7 Jan 2025 13:20:00 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
shiltian wrote:
ping @arsenm @topperc
https://github.com/llvm/llvm-project/pull/104661
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 9dfb68ddc02bb70b3c9ff9d5aeedabbc2feed258 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Dec 2024 23:50:06 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
Author: Shilei Tian
Date: 2024-12-29T22:28:14-05:00
New Revision: 49331ab0b9a41f925153fe03cd7e0d4a33b7c3d4
URL:
https://github.com/llvm/llvm-project/commit/49331ab0b9a41f925153fe03cd7e0d4a33b7c3d4
DIFF:
https://github.com/llvm/llvm-project/commit/49331ab0b9a41f925153fe03cd7e0d4a33b7c3d4.diff
L
@@ -1115,14 +1117,13 @@ def fno_convergent_functions : Flag<["-"],
"fno-convergent-functions">,
// Common offloading options
let Group = offload_Group in {
-def offload_arch_EQ : Joined<["--"], "offload-arch=">, Flags<[NoXarchOption]>,
shiltian wrote:
then @
@@ -1115,14 +1117,13 @@ def fno_convergent_functions : Flag<["-"],
"fno-convergent-functions">,
// Common offloading options
let Group = offload_Group in {
-def offload_arch_EQ : Joined<["--"], "offload-arch=">, Flags<[NoXarchOption]>,
shiltian wrote:
If tha
@@ -1115,14 +1117,13 @@ def fno_convergent_functions : Flag<["-"],
"fno-convergent-functions">,
// Common offloading options
let Group = offload_Group in {
-def offload_arch_EQ : Joined<["--"], "offload-arch=">, Flags<[NoXarchOption]>,
shiltian wrote:
I thou
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/125135
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shiltian wrote:
> We already have a host-side libomptarget:
+1, though as @jhuber6 mentioned, we did name it prefix with
`libomptarget-nvptx64` or `libomptarget-amdgcn` before. I think this is a great
opportunity to make it more appropriate. However, I don't have strong opinion
against it.
h
@@ -22819,8 +22819,12 @@ class GlobalDeclRefChecker final : public
StmtVisitor {
void declareTargetInitializer(Decl *TD) {
A = TD->getAttr();
DeclVector.push_back(cast(TD));
+llvm::DenseSet Visited;
while (!DeclVector.empty()) {
VarDecl *TargetVarDecl
shiltian wrote:
The fix looks reasonable to me. @alexey-bataev WDYT?
https://github.com/llvm/llvm-project/pull/126269
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https://github.com/shiltian approved this pull request.
Hope the bot will be happy as well
https://github.com/llvm/llvm-project/pull/126143
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https://github.com/llvm/llvm-project/pull/122629
>From 00756872a2521510b2d4012a65d8fd6f21d07843 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 11:59:06 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian commented:
test?
https://github.com/llvm/llvm-project/pull/125896
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@@ -1,49 +1,49 @@
// REQUIRES: x86-registered-target, amdgpu-registered-target
// Fail on invalid ROCm Path.
-// RUN: not %clang -### --target=x86_64-unknown-linux-gnu -fopenmp
--offload-arch=gfx908:xnack+ -fsanitize=address -fgpu-sanitize -nogpuinc
--rocm-path=%S/Inputs/r
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/125891
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@@ -1,49 +1,49 @@
// REQUIRES: x86-registered-target, amdgpu-registered-target
// Fail on invalid ROCm Path.
-// RUN: not %clang -### --target=x86_64-unknown-linux-gnu -fopenmp
--offload-arch=gfx908:xnack+ -fsanitize=address -fgpu-sanitize -nogpuinc
--rocm-path=%S/Inputs/r
shiltian wrote:
I'm not sure if calling it `libomp.a` is a good idea. I personally find it
confusing because "libomp" is already an established name—it refers to the
OpenMP host runtime contributed by Intel, just as "libgomp" is the OpenMP host
runtime for GCC. These names are well-recognized.
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/126914
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shiltian wrote:
@krzysz00 Do you suggest that the actual value doesn't matter? Like, 128 is not
better or worse than 256.
https://github.com/llvm/llvm-project/pull/79035
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shiltian wrote:
What is the best case (from the compiler optimization perspective) that we can
expect from `amdgpu-max-num-workgroups`? For example, is a smaller value
better? I’d imagine that with a smaller value, the compiler can assume each
workgroup has access to more resources. If that’s
@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
@@ -5965,6 +5967,266 @@ static bool teamsLoopCanBeParallelFor(Stmt *AStmt, Sema
&SemaRef) {
return Checker.teamsLoopCanBeParallelFor();
}
+static Expr *getInitialExprFromCapturedExpr(Expr *Cond) {
+
+ Expr *SubExpr = Cond->IgnoreParenImpCasts();
+
+ if (auto *DeclRef = dy
@@ -10520,11 +10794,22 @@ StmtResult
SemaOpenMP::ActOnOpenMPSectionDirective(Stmt *AStmt,
DSAStack->isCancelRegion());
}
+/// PseudoObjectExpr is a Trait for dispatch containing the
+/// function and its variant. Returning only the functio
@@ -5965,6 +5967,266 @@ static bool teamsLoopCanBeParallelFor(Stmt *AStmt, Sema
&SemaRef) {
return Checker.teamsLoopCanBeParallelFor();
}
+static Expr *getInitialExprFromCapturedExpr(Expr *Cond) {
+
+ Expr *SubExpr = Cond->IgnoreParenImpCasts();
+
+ if (auto *DeclRef = dy
@@ -5965,6 +5967,266 @@ static bool teamsLoopCanBeParallelFor(Stmt *AStmt, Sema
&SemaRef) {
return Checker.teamsLoopCanBeParallelFor();
}
+static Expr *getInitialExprFromCapturedExpr(Expr *Cond) {
+
+ Expr *SubExpr = Cond->IgnoreParenImpCasts();
+
+ if (auto *DeclRef = dy
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/117904
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@@ -7209,8 +7482,9 @@ ExprResult SemaOpenMP::ActOnOpenMPCall(ExprResult Call,
Scope *Scope,
Exprs.erase(Exprs.begin() + BestIdx);
} while (!VMIs.empty());
- if (!NewCall.isUsable())
+ if (!NewCall.isUsable()) {
return Call;
+ }
shiltian wrote:
@@ -10556,15 +10841,18 @@
SemaOpenMP::ActOnOpenMPDispatchDirective(ArrayRef Clauses,
E = E->IgnoreParenCasts()->IgnoreImplicit();
if (auto *BO = dyn_cast(E)) {
- if (BO->getOpcode() == BO_Assign)
+ if (BO->getOpcode() == BO_Assign) {
TargetCall = ge
@@ -5979,6 +6241,17 @@ StmtResult SemaOpenMP::ActOnOpenMPExecutableDirective(
OMPExecutableDirective::getSingleClause(Clauses))
BindKind = BC->getBindKind();
+ if ((Kind == OMPD_dispatch) && (Clauses.size() > 0)) {
shiltian wrote:
```suggestion
@@ -5965,6 +5967,266 @@ static bool teamsLoopCanBeParallelFor(Stmt *AStmt, Sema
&SemaRef) {
return Checker.teamsLoopCanBeParallelFor();
}
+static Expr *getInitialExprFromCapturedExpr(Expr *Cond) {
+
+ Expr *SubExpr = Cond->IgnoreParenImpCasts();
+
+ if (auto *DeclRef = dy
@@ -5965,6 +5967,266 @@ static bool teamsLoopCanBeParallelFor(Stmt *AStmt, Sema
&SemaRef) {
return Checker.teamsLoopCanBeParallelFor();
}
+static Expr *getInitialExprFromCapturedExpr(Expr *Cond) {
+
+ Expr *SubExpr = Cond->IgnoreParenImpCasts();
+
+ if (auto *DeclRef = dy
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/119261
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@@ -0,0 +1,11 @@
+// REQUIRES: asserts
+
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-cpu x86-64
-disable-llvm-passes -fopenmp-targets=amdgcn-amd-amdhsa -x c++ -emit-llvm-bc %s
-o %t-x86-host.bc
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -aux-triple
x86_64-un
shiltian wrote:
gentle ping
https://github.com/llvm/llvm-project/pull/104661
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@@ -1,4 +1,5 @@
set(LLVM_LINK_COMPONENTS
+ Core
shiltian wrote:
> This shouldn't be necessary. I think this code is in the wrong place, I would
> expect it to go in lib/CodeGen/Targets, not lib/Basic
And then to have clang depend on LLVM's CodeGen component?
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From f01858b4850cef77794959a36ec704e125838b73 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 16 Dec 2024 21:51:53 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 9e23538a7cac72fe456fb039b5e0f321a0f3e142 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 16 Dec 2024 21:51:53 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -1846,6 +1846,16 @@ class TargetInfo : public TransferrableTargetInfo,
return std::make_pair(64, 64);
}
+ /// Returns the optimal vector type elements based on the provided vector
+ /// type. For example, on some targets, a vector with 3 elements may be
+ /// treat
@@ -2903,7 +2903,10 @@ TargetOMPContext::TargetOMPContext(
const FunctionDecl *CurrentFunctionDecl,
ArrayRef ConstructTraits)
: OMPContext(ASTCtx.getLangOpts().OpenMPIsTargetDevice,
- ASTCtx.getTargetInfo().getTriple()),
+ ASTCtx.getT
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/119261
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https://github.com/llvm/llvm-project/pull/104661
>From c422624756e9b40b3fee02c6b3bb49d3355a1bbe Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 13 Dec 2024 00:35:28 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -1846,6 +1846,16 @@ class TargetInfo : public TransferrableTargetInfo,
return std::make_pair(64, 64);
}
+ /// Returns the optimal vector type elements based on the provided vector
+ /// type. For example, on some targets, a vector with 3 elements may be
+ /// treat
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 007818c271c18d96c112fc1835b4175ab6d509f3 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 13 Dec 2024 00:37:55 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -1,4 +1,5 @@
set(LLVM_LINK_COMPONENTS
+ Core
shiltian wrote:
This is needed because `TargetInfo.cpp` now needs LLVM types.
https://github.com/llvm/llvm-project/pull/104661
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@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
Eventually we might do it like:
```
bool
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From e4b3028885112cd33206051292b3b397f90a3d5c Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 13 Dec 2024 00:38:50 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
`unsigned getOptimalVectorNumElements(cons
@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
I took another look and this is not only a
@@ -8026,10 +8026,6 @@ def fhlsl_strict_availability : Flag<["-"],
"fhlsl-strict-availability">,
Group,
MarshallingInfoFlag>;
-def fpreserve_vec3_type : Flag<["-"], "fpreserve-vec3-type">,
- HelpText<"Preserve 3-component vector type">,
- MarshallingInfoFlag>,
- Implie
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/104661
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https://github.com/shiltian commented:
update the openmp doc as well?
https://github.com/llvm/llvm-project/pull/117904
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shiltian wrote:
@alexey-bataev What do you think? I'm not very familiar with some front end
concepts used in this PR.
https://github.com/llvm/llvm-project/pull/117904
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@@ -141,6 +141,12 @@ struct VariantMatchInfo {
ISATraits.push_back(RawString);
RequiredTraits.set(unsigned(Property));
+#if 0
shiltian wrote:
what is this for?
https://github.com/llvm/llvm-project/pull/117904
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@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 69d491983634adb2c059025ac848d1c53b0b282a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 13 Dec 2024 08:59:59 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/119261
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@@ -1270,77 +1270,21 @@ exit:
; MODULE: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
; MODULE: attributes #[[ATTR2:[0-9]+]] = { convergent nocallback nofree
nounwind willreturn }
; MODULE: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync nounwind
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/116723
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https://github.com/llvm/llvm-project/pull/116723
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@@ -7831,10 +7831,14 @@ void
CodeGenFunction::EmitOMPTaskLoopBasedDirective(const OMPLoopDirective &S) {
// grainsize clause
Data.Schedule.setInt(/*IntVal=*/false);
Data.Schedule.setPointer(EmitScalarExpr(Clause->getGrainsize()));
+Data.HasModifier =
+(
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/117256
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/117256
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@@ -4666,30 +4666,58 @@ void CGOpenMPRuntime::emitTaskLoopCall(CodeGenFunction
&CGF, SourceLocation Loc,
CGF.getContext().VoidPtrTy);
}
enum { NoSchedule = 0, Grainsize = 1, NumTasks = 2 };
- llvm::Value *TaskArgs[] = {
- UpLoc,
-
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/117260
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/117260
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@@ -706,6 +706,10 @@ class LangOptions : public LangOptionsBase {
return OpenCL || CUDA;
}
+ /// Return true if the dispatch size for an offload language only uses one
+ /// dimension.
+ bool gridSizeIsOneDimension() const { return CUDA || HIP || OpenMP; }
---
@@ -0,0 +1,7 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa %s -o - | FileCheck %s
+
+; CHECK: .amdhsa_code_object_version 6
shiltian wrote:
ah, they check the IR match Lol. I will add one later then.
https://github.com/llvm/llvm-project/pull/118515
_
shiltian wrote:
I was thinking this PR looks familiar...
https://github.com/llvm/llvm-project/pull/118907
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shiltian wrote:
> The kernels do, but the callable __omp_offloading functions are missing them
> for some reason.
The OpenMP GPU CodeGen only calls it on the target entry point.
https://github.com/llvm/llvm-project/pull/119009
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@@ -706,6 +706,10 @@ class LangOptions : public LangOptionsBase {
return OpenCL || CUDA;
}
+ /// Return true if the dispatch size for an offload language only uses one
+ /// dimension.
+ bool gridSizeIsOneDimension() const { return CUDA || HIP || OpenMP; }
---
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/122143
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shiltian wrote:
I don't think it should be GPU code generation path as there is no explicit
`target` region used.
https://github.com/llvm/llvm-project/pull/122149
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@@ -31,8 +30,8 @@ void SYCLInstallationDetector::addSYCLIncludeArgs(
}
// Unsupported options for SYCL device compilation.
-static ArrayRef getUnsupportedOpts() {
- return {
+static ArrayRef getUnsupportedOpts() {
shiltian wrote:
maybe it's a good idea to re
shiltian wrote:
What code generation path would be used in this case? The GPU code generation
or regular host OpenMP?
https://github.com/llvm/llvm-project/pull/122149
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shiltian wrote:
I think that is a misuse of OpenMP semantics. We can't expect to have regular
OpenMP code working in the same way as OpenMP offloading code when targeting a
GPU meanwhile while the code is not wrapped into `target` region. I understand
to have variants and declare target is not
shiltian wrote:
> It should maintain the normal semantics you'd get with -fopenmp except it
> codegens certain things differently.
That is the key difference.
> Alternatively I could just remove OpenMP entirely from the DeviceRTL so I
> might just do that instead.
+1
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https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/122627
This a prime patch to support generic target when using `--offload-compress`.
>From 95332e05f381f7e80cd1c57420db0c56cf8aedcf Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sat, 11 Jan 2025 21:24:53 -0500
Sub
shiltian wrote:
* **#122627** https://app.graphite.dev/github/pr/llvm/llvm-project/122627?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/122
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