[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

https://github.com/HankChang736 created https://github.com/llvm/llvm-project/pull/128636 This patch use the hook getClobbers() in RISCV target and mark {vl, type} as clobber to prevent Post-RA scheduler moving vsetvl across inline assembly. Fixing [#97794](https://github.com/llvm/llvm-project/

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

HankChang736 wrote: > I think this may not be the right way. > > 1. We should at least add vl/vtype to clobbered registers when V is > specified. > > 2. The asm may not depend on vl/type, but adding vl/type dependencies > unconditionally stop further scheduling. Yes, you're right. Bu

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

https://github.com/HankChang736 updated https://github.com/llvm/llvm-project/pull/128636 >From d7718e9ed9f03990895f0d89b87808d8c96bb67c Mon Sep 17 00:00:00 2001 From: Hank Chang Date: Sun, 23 Feb 2025 23:59:23 +0800 Subject: [PATCH 1/2] [RISCV] Mark {vl, vtype} as clobber in inline assembly Th

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

@@ -68,7 +68,7 @@ class RISCVTargetInfo : public TargetInfo { return TargetInfo::VoidPtrBuiltinVaList; } - std::string_view getClobbers() const override { return ""; } + std::string_view getClobbers() const override { return "~{vl},~{vtype}"; } HankCha

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

HankChang736 wrote: I tried the test case below without passing 'v' extension in Clang command line argument. `__attribute__((target("zve32x"))) void test_A(int *p) { asm volatile("" :: "A"(*p)); } ` The generated LLVM IR result is : `; Function Attrs: nounwind define dso_local void @test_A(pt

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

HankChang736 wrote: I tested the following case without passing the 'v' extension in the Clang command line argument: ```c __attribute__((target("arch=rv32gcv_zve32x"))) void test_A(int *p) { asm volatile("" :: "A"(*p)); } ``` The generated LLVM IR result is: ``` ; Function Attrs: nounwind def

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

https://github.com/HankChang736 updated https://github.com/llvm/llvm-project/pull/128636 >From d7718e9ed9f03990895f0d89b87808d8c96bb67c Mon Sep 17 00:00:00 2001 From: Hank Chang Date: Sun, 23 Feb 2025 23:59:23 +0800 Subject: [PATCH 1/3] [RISCV] Mark {vl, vtype} as clobber in inline assembly Th

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

@@ -68,7 +68,11 @@ class RISCVTargetInfo : public TargetInfo { return TargetInfo::VoidPtrBuiltinVaList; } - std::string_view getClobbers() const override { return ""; } + std::string_view getClobbers() const override { +if (ISAInfo->hasExtension("zve32x"))

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

https://github.com/HankChang736 edited https://github.com/llvm/llvm-project/pull/128636 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Mark {vl, vtype} as clobber in inline assembly (PR #128636)

HankChang736 wrote: I create another pull request [#130733](https://github.com/llvm/llvm-project/pull/130733) that is implemented with the RISCVInsertVSETVL approach, since it's a new approach. https://github.com/llvm/llvm-project/pull/128636 ___ cfe